Hitachi AP1 - Page 134

HMCS47C,HMCS47CL-------------------------------------------------------
Group Mnemonic
Function
MNEI i
M
....
i
VNEI i
V
!::o;.
i
ANEM A
....
M
Compare Instruction BNEM B
....
M
ALE
I i A
s:::
i
ALEM A
s:
M
BLEM B
s:
M
RAM Bit Manipulation
SEM n
"'"
-+
MinI
REM n "0"
-+
MinI
Instruction
TM n Test
MinI
BR a
Branch on Status 1
ROM Address
CAL a
Subroutine Jump on Status ,
LPU u
Load Program Counter Upper on Status
Instruction
TBR p Table Branch
RTN
Return from Subroutine
SEIE
"'"
-+
I/E
SEIFO
"1"
-+
IFO
SElF'
"'"
-+
IF'
SETF
"'"
-+
TF
SECF
"'"
-+
CF
REIE "0"
-+
I/E
REIFO "0"
-+
IFO
REIF1
"0"
-+
IF'
Interrupt Instruction
RETF "0"
-+
TF
RECF
"0"
-+
CF
TIO
Test INTo
TI'
Test INT.
TIFO
Test
IFO
TIF'
Test
IF1
TTF Test
TF
LTI i
i
-+
Timer/Counter
LTA
A
-+
Timer/Counter
LAT
Timer/Counter -+ A
RTNI
Return Interrupt
SED
"1" -+
o IVI
RED
"0" -+ o IVI
TO
Test o IVI
SEOO n "1" -+ o Inl
Input/Output
REDO n "0" -+ o Inl
Instruction
LAR p Rlpl
-+
A
LBR p
Rlpl
-+
B
LRA p A
-+
R Ipl
LRB p B
-+
R Ipl
P p Pattern Generation
NOP
No Operation
[NOTE) ,. (XVI after a mnemonic code has four meanings as follows.
Mnemonic only
Mnemonic with X
Mnemonic with Y
Mnemonic with XV
[Example) LAM
LAMX
LAMV
LAMXY
Instruction execution only
After instruction execution, X ... SPX
After instruction execution, V ... SPY
After instruction execution, X ... SPX, y ... SPY
M .... A
M .... A, X ... SPX
M .... A, y ... SI>V
M .... A, X ... SPX, Y ... Spy
Status
NZ
NZ
NZ
NZ
NB
NB
NB
MinI
,
1
,
INTo
INT.
IFO
IF'
TF
OIVI
2. Status column shows the factor which brings the Status F/F "'" under judgement instruction or instruction accompanying the judgement.
NZ .... ALU Not Zero
C ..... ALU Overflow in Addition, that is, Carry
NB .... ALU Overflow in Subtraction, that is, No Borrow
Except above ....... Contents of the status column affects the Status F/F directly.
3. The Carry F/F (C(F/FII is not always affected by executing the instruction which affects the Status F/F.
Instructions which affect the Carry F/F are eight as follows.
AMC SEC
SMC
OAA
OAS
REC
ROTL
ROTR
4. All instructions except the pattern instruction (PI are executed in 1-cycle. The pattern instruction (PI is executed in 2-cycle.
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