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HiTech Global HTG-ZRF8 User Manual

HiTech Global HTG-ZRF8
41 pages
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HTG-ZRF8 Platform User Manual
www.HiTechGlobal.com
1
HiTech Global ZYNQ UltraScale+RFSoC Development Platform
HTG-ZRF8 User Manual
Version 1.0 August 2018
Copyright © HiTech Global 2004-2018
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HiTech Global HTG-ZRF8 Specifications

General IconGeneral
BrandHiTech Global
ModelHTG-ZRF8
CategoryMotherboard
LanguageEnglish

Summary

1.0) Overview

2.0) HTG-ZRF8 Platform's Features

3.0) Diagram Introductions

FPGA Bank Assignment

Visual representation of FPGA I/O bank assignments and associated signals.

System Block Diagram

High-level diagram showing system components and their interconnections.

Clock Block Diagram

Diagram illustrating the clock generation and distribution pathways on the platform.

Mechanical Drawing

Shows the physical dimensions and layout of the HTG-ZRF8 board.

4.0) Clock Sources

5.0) PCI Express Interface

PCI Express Clock Circuit

Details the PCI Express clock circuit and its jitter attenuator.

PCI Express Clock Enable Circuit

Circuit diagram showing the logic for enabling the PCI Express clock.

6.0) DDR-4 Memory

7.0) FMC+ Interface

FMC+ Connector Grid Labeling

Diagram showing the pinout grid labeling for the FMC+ connector.

FMC+ Clock and VADJ Configuration

Details FMC+ clock generation and adjustable voltage (VADJ) configuration.

8.0) ADC and DAC Ports

ADC/DAC Clock Diagram

Diagram showing clock connections for ADC and DAC interfaces.

9.0) USB To UART Bridges

10.0) ARM Trace Port

11.0) SDIO Interface

12.0) Ethernet Interface

13.0) Display Port

14.0) USB 2.0/3.0 Interfaces

15.0) SATA Interface

16.0) 1-PPS Interface

17.0) User Interface Elements

18.0) IP Protection

19.0) I2C Bus Switch

20.0) System Configuration

Quad-SPI Configuration

Procedure for booting from Quad-SPI flash memory.

Micro SD Configuration

Procedure for booting the device from an SD card.

21.0) Configuration Options