HP 8340b Operating Instructions

DIO LINES
T 1 T e T 3 T.T 5
I I I I I
1 I I I I
J I I I I
I I I I I
Te t 7 t s t s
I I I I
I i I I
T I0 T I1 T 12 T 13 T H
I I I I I
J I I I I
I I I I 1
’15 '16 47 18
II II
I I I I
I I
Period in which data
is guaranteed
to be valid.
v\\ Period in which all
W 1isteners become
ready -for data.
Period in which
all 1isteners
accept data.
This timing diagram illustrates the handshake process by indicating the actual waveforms of the DAV, NRFD, and
NDAC lines. The NRFD and NDAC signals each represent composite waveforms resulting from two or more
listeners accepting the same data byte at slightly different times, which is usually caused by variations in the
transmission path length and individual instrument response rates. Two cycles of the handshake sequence are
shown.
The handshake process follows this typical list of events:
P! Source initializes DAV to high (False — data not valid). Acceptors initialize NRFD to low (True — none are
ready for data), and set NDAC low (True — none have accepted the data).
Ti Source checks for error condition (both NRFD and NDAC high), then places data byte on DIO lines.
P 2 Source delays to allow data to settle on DIO lines.
T 2 Acceptors have all indicated readiness to accept first data byte; NRFD goes high.
T 3 When the data is settled and valid, and the source has sensed NRFD high, DAV is set low.
T 4 First acceptor sets NRFD low to indicate that it is no longer ready, then accepts the data. Other acceptors
follow at their own rates.
T 5 First acceptor sets NDAC high to indicate that it has accepted the data (NDAC remains low due to other
acceptors driving NDAC low).
T 6 Last acceptor sets NDAC high to indicate that it has accepted the data; all have now accepted and NDAC
goes high.
T 7 Source, having sensed that NDAC is high, sets DAV high. This indicates to the acceptors that data on the
DIO lines must now be considered invalid. Upon completion of this step, one byte of data has been trans¬
ferred.
P 3 (T r T 10 ) Source changes data on the DIO lines.
P 4 (T 10 -T 12 ) Source delays to allow data to settle on the DIO lines.
Figure 3-26. HP-IB Handshake Timing (1 of 2)
3-84
Operating Information
HP 8340B/41B

HP 8340b Specifications

General

Brand	HP
Model	8340b
Category	Inverter
Language	English