System Board
System Chipset
Chapter 230
System Chipset
Memory Controller Hub (Intel 860)
The MCH supports:
• The 400 MHz (quad-pumped 100MHz) front side bus for up to two
Intel dp Xeon processors
• Two Rambus channels with up to 8 PC800 ECC RIMMs total
• An Accelerated Graphics Port, AGP Pro 110 4x with 1.5V signaling
only.
• Two source-synchronous, enhanced, Hublink buses:
— Hublink A is an 8-bit, 133 MB/s connection to the ICH2
— Hublink B is a 16-bit, 266 MB/s bus to the P64H
PCI 64-bit Hub (Intel 82086)
P64H provides the interface to the 64-bit, 66 MHz PCI bus with
embedded SCSI controller chip and two 3.3 V PCI slots.
When 33 MHz cards are present, the P64H detects this condition and
lowers the bus frequency to 33 MHz. Only 3.3 V cards can be used.
Interface Controller Hub (Intel 82801BA)
The ICH2 is the interface to:
• a 32-bit, 33 MHz PCI bus with embedded LAN and three 5 V PCI
slots
• Two ATA100 IDE Controllers, which support DMA transfers rates for
up to four devices
The IDE/ATA interface on the x4000 is provided primarily for use
with optical devices
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