System Board
System Chipset
Chapter 232
SCSI Controller Chip (LSI SYM43C1010R)
The SCSI chip is a 64 bit/66 MHz PCI DMA bus master device. It
includes 2 Ultra160 SCSI controllers, each with it's own independent
channel. One channel is connected via ribbon cable to up to two internal
SCSI devices. The other channel is routed to a back-panel connector to
support external devices
SCSI features:
• Double Transition (DT) clocking. DT Clocking permits data transfer
up to 160 MB/s on each channel, for a total of 320 MB/s
• Cyclic Redundancy Check (CRC). CRC improves the integrity of the
SCSI data transmission through enhanced detection of
communication errors. This is augmented with Asynchronous
Information Protection to provide complete end-to-end protection of
the SCSI I/O.
• Domain Validation. SureLink Domain Validation automatically tests
and adjusts the SCSI transfer rate to ensure data integrity at the
fastest speed.
• LVD and Single-ended (SE) transfers. If an SE device is connected,
the channel it is connected to operates as an SE bus.
• PCI 2.2 compliant
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