Register to be Displayed
J
U
v
L
T
o
R
S
G
H
*
FI
*FT
Q
*C
*F
*TT
*TI
* JI
*GS
*GT
*
GUV-GCD
*HS
*HT
* HUV-HCD
Usual Function
Instruction Address (high-order bits)
Instruction Address (low-order bits)
Data Address (high-order bits)
Data Address (low-order bits)
Data Length
Auxiliary Storage Address
General
Purpose Data Register
Storage Data Register
Status (CPU)
Instruction
Operation
Code
Priority Status Register
Multiplexor Channel
Bus-In
Multiplexor Channel Tags
Storage-Protection key in
PS#
(High
4-bits)
Storage-Protectection
key
of
block
of
storage just used (low
4-bits)
Interval Timer Count
External
Interrupt: Interval Timer (bit
0)
Console (bit 1) Six
direct-control
interrupts (bits 2 through
7)
1050 Documentary Console Tags
1050 Documentary Console Bus-In
Direct Control Bus-In
Selector
Channel
One
Status
Selector
Channel
One
Tags
GUV contains storage address for
data
for
selector-channel
one.
GCD
contains
the
current
byte
count
for
selector-channel
one
Sel
ector
Cha nne I
Two
Sta tus
Selector
Channel
Two
Tags
HUV contains storage address for
data
for
selector-channel
two.
HCD
con-
tains
the
current byte
count
for
selector-channel
two.
Where Displayed
A-register
(also
the
high-order
eight
bits
of
the
main-storage address !
register
if
the
allow-write
indicator
is
off)
A-register
(also
the
low-order
eight
bits
of
the
main-storage address
register
if
the
allow-write
indicator
is
off)
A-register
(also
the
high-order
eight
bits
of
the
main-storage address
register
if
the
allow-write
indicator
is
off)
A-register
(also
the
low-order
eight
bits
of
the
main-storage address
register
if
the
allow-write
indicator
is
off)
A-register
A-register
A-register
A-register
(Also has own display in moin-storage
data-register
indicators)
A-register
A-register
A-register
A-register
A-register
A-register
A-register
A-register
A-register
A-register
A-register
A-register
A-register
GUV in moin-storage address
register.
GCD
in
count register (18 bits
each).
A-register
A-register
HUV
in
main-storage address
register.
HCD in
count
register (18 bits
each)
Note:
* Indicates
that
you
cannot
manually store
data
in
the designated register
Figure
8.
Display
26
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