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Inrevium TB-FMCH-HDMI2 User Manual
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TB
-FMCH-HDMI2 Hardware User Manual
1
Re
v
.1.05
TB
-FMCH-HDMI
2
Hardware
User
M
anual
Rev
.1.
05
2
Table of Contents
Default Chapter
3
Table of Contents
3
1 Related Documents and Board Accessories
8
2 Overview
8
Table 2-1 ROM Data
8
3 Feature
9
Figure 3-1 FMC Connector Pin Layout
9
4 Tb-Fmch-Hdmi2-Rx
10
Block Diagram
10
Figure 4-1 TB-FMCH-HDMI2-RX Block Diagram
10
External View of the Board
11
Figure 4-2 External View of TB-FMCH-HDMI2-RX (Component Side)
11
Figure 4-3 External View of TB-FMCH-HDMI2-RX (Solder Side)
11
Board Specification
12
Figure 4-4 TB-FMCH-HDMI2-RX Board Dimensions
12
Supplying Power to the Board
13
Figure 4-5 TB-FMCH-HDMI2-RX Power Supply Structure
13
HDMI Receiver
14
Table 4-1 HDMI Connector (Receiving Side)
14
Table 4-2 SCL/SDA Jumper Setting
14
FMC Connector
15
Table 4-3 JP1 Jumper Setting
15
Table 4-4 FMC Connector Pin Assignment
16
Other Interfaces
18
EEPROM Interface
18
JTAG Interface
18
General-Purpose Clock Interface
18
Table 4-5 JTAG Connector
18
LED Status
19
Control Function
19
Table 4-6 LED Status
19
Table 4-7 Switches
19
FPGA Pin Assignment
20
Table 4-8 FPGA Pin Assignment
20
FPGA Output Data Phase
27
Figure 4-6 FPGA Output Data Timing
27
Image Size
28
5 Tb-Fmch-Hdmi2-Tx
29
Block Diagram
29
Figure 5-1 TB-FMCH-HDMI2-TX Block Diagram
29
External View of the Board
30
Figure 5-2 TB-FMCH-HDMI2-TX (Component Side)
30
Figure 5-3 TB-FMCH-HDMI2-TX (Solder Side)
30
Board Specification
31
Figure 5-4 TB-FMCH-HDMI2-TX Board Dimensions
31
Power Supply to the Board
32
Figure 5-5 TB-FMCH-HDMI2-TX Power Supply Structure
32
HDMI Transmitter
33
Table 5-1 HDMI Connector (Transmit Side)
33
FMC Connector
34
Table 5-2 JP3 Jumper Setting
34
Table 5-3 FMC Connector Pin Assignment
35
Other Interfaces
37
JTAG Interface
37
General-Purpose Clock Interface
37
Table 5-4 JTAG Connector
37
LED Status
38
Relation of ROM and Input Video Format
38
Table 5-5 LED Status
38
Table 5-6 Relation of ROM and Input Video Format
38
Control Function
39
Table 5-7 Switch Function
39
FPGA Pin Assignment
40
Table 5-8 FPGA Pin Assignment
40
FPGA Input Data Phase
47
Figure 5-6 FPGA Input Data Timing
47
Image Size
48
1100 DDC Connection (Normal/ Through)
49
DDC Connection (Normal)
49
Figure 6-1 DDC Connection Structure (Normal)
49
Table 6-1 DDC Jumper Setting (Normal)
49
DDC Connection (Through)
50
Figure 6-2 DDC Connection Structure (Through)
50
Table 6-2 DDC Jumper Setting (Through)
50
7 Default Switch Setting
51
Figure 7-1 TB-FMCH-HDMI2-RX Default Switch Settings (Component Side)
51
Table 7-1 TB-FMCH-HDMI2-RX Default Settings (JP Pin)
51
Table 7-2 TB-FMCH-HDMI2-RX Default Setting (DSW/RSW)
52
Figure 7-2 TB-FMCH-HDMI2-TX Default Settings (Component Side)
53
Table 7-3 TB-FMCH2-TX Default Settings (JP Pin)
53
Table 7-4 TB-FMCH-HDMI2-TX Default Switch Settings (DSW/RSW)
54
8 Usage Example
55
Figure 8-1 Usage Example
55
Table 8-1 Setting Example
55
4
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Inrevium TB-FMCH-HDMI2 Specifications
General
Interface
FMC (HPC)
Form Factor
FMC (FPGA Mezzanine Card)
FPGA Compatibility
Virtex-7, Kintex-7, Artix-7
Audio Support
Yes
Connector
HDMI Type-A