JBL CHARGE 5 - Control and Detection Circuits; Dynamic Pressure Detection; Logic Control and Button Interfaces

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Vin/Vout=(1+RF/RG)
Audio_out_L
V_REFE
Audio_out_R
V_REFE_R
V_REFE
V_REFE_R
V_REFE
V_REFE_R
Audio_out_R
POWER_OFF_READY
POWER_KEY
POWER_ON
DC_BIAS
POWER_ON_OFF
Audio_Det_CTL
DC_DET
VREG_EN
Audio_out_L
V_REFE
Audio_Det_CTL
POWER_KEY
DC_BIAS
POWER_ON_OFF
POWER_OFF_READY
Audio_Det_CTL
DC_DET
VREG_EN
POWER_ON
BT_STATUS
BT_STATUS
V_REFE_R
OP_3V3
OP_3V3
OP_3V3
OP_3V3
OP_3V3
LOG_3V3
OP_3V3
DAC_3V3
Audio_out_L
Audio_out_R
DC_DET
POWER_ON
POWER_KEY
POWER_ON_OFF
POWER_OFF_READY
VREG_EN
7
DC_BIAS
Control_15V
BT_STATUS
Q11
3DG3904M
C54
2.2UF/10V/X5R
R830 0
R179
56K/1%
R166
10K
POWER_OFF_READY
C37
10UF/6.3V/X5R
R175
1K
POWER_KEY
R47
10K/1%
R57
10K/1%
R29 10K/1%
D3 1N4148WS
C45
2.2UF/10V/X5R
D6 1N4148WS
R163
11.8K/±1%
R41 10K/1%
R34
20K/1%
DC_DET
R53
1.2Mȍ
R181
5.11Kȍ/1%
R174 100
U17
SLG4V44057V
VDD
1
Power Key
2
Audio out
3
Power_On_Off
4
Power_Off_Ready
5
Audio_Input
6
ext Vref 367mV
7
GND
8
Power On
9
NC
10
VREG_EN
11
NC
12
NC
13
5V_DET
14
D4 1N4148WS
C39
10UF/6.3V/X5R
C51 68pF/50V/NP0
R54
27K/±1%
C34 68pF/50V/NP0
R55
10K/1%
R832
20K/1%
C52
10UF/6.3V/X5R
LOG_12
POWER_ON_OFF
D5
1N4148WS
C539
10uF/6.3V/X5R
R44 10K/1%
R788 1K
R827 0
C43
2.2UF/10V/X5R
C165
100pF/50V/NP0
OP_OUT
R31
20K/1%
R33
10K/1%
R173
1K
C163
1uF/10V/X5R
C164
100pF/50V/NP0
U5
TLV9062IDDFR
OUT A
1
-IN A
2
+IN A
3
V-
4
+IN B
5
-IN B
6
OUT B
7
V+
8
R172 100
R32
10K/1%
R167 10K
R180 1K/1%
C53 4.7uF/6.3V/X5R
R56
1M/1%
C48 4.7uF/6.3V/X5R
C47 4.7uF/6.3V/X5R
VREG_EN
U7
TLV9062IDDFR
OUT A
1
-IN A
2
+IN A
3
V-
4
+IN B
5
-IN B
6
OUT B
7
V+
8
U4
TLV9062IDDFR
OUT A
1
-IN A
2
+IN A
3
V-
4
+IN B
5
-IN B
6
OUT B
7
V+
8
R151 0
C36 4.7uF/6.3V/X5R
C56 4.7uF/6.3V/X5R
R829 0
LOG_13
DC_BIAS
C35 4.7uF/6.3V/X5R
R831
20K/1%
R168
100K
Audio_Det_CTL
POWER_ON
R52
100K
R828 0
R46 10K/1%
R170
100K
R30
10K/1%
R178
10K/1%
BT_STATUS
Circuit Diagram-Main Board