1-25
KD-S723R/KD-S721R
ANTI-
ALIASING
FILTER
CLOCKED
COMPARATOR
COSTAS LOOP
VARIABLE AND
FIXED DIVIDER
57 kHz
BANDPASS
(8th ORDER)
RECONSTRUCTION
FILTER
OSCILATOR
AND
DIVIDER
BIPHASE
SYMBOL
DECODER
TEST LOGIC AND OUTPUT
SELECTOR SWITCH
CLOCK
REGERATION
AND SYNC
REFERENCE
VOLTAGE
DIFFERENTIAL
DECODER
QUALITY BIT
GENERATOR
8
4
7
5
VP1
3
6 11
15
15
2
1
121413
910
SAA6579T-X(IC71):RDS Detector
1.Pin layout
2.Block diagram
3.Pin function
QUAL
DATA
Vref
MUX
V
dd
GND
CIN
SCOUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CLK
T57
OSCO
OSCI
V
dd
GND
TEST
MODE
Symbol
QUAL
DATA
Vref
MUX
Vdd
GND
CIN
SCOUT
MODE
TEST
GND
Vdd
OSCI
OSCO
T57
CLK
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
Quality indication output
RDS data output
Reference voltage output (0.5VDDA)
Multiolex signal input
+5V supply voltage for analog part
Ground for analog part (0V)
Subcarrier input to comparator
Subcarrier output of reconstruction filter
Oscllator mode / test control input
Test enable input
Ground for digital part (0V)
+5V supply voltage for digital part
Oscillator input
Oscillator output
57 kHz clock signal output
RDS clock output
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
To Next Page
Loading...
Need help?
General
