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Lattice Semiconductor iCE40 UltraPlus - Page 3

Lattice Semiconductor iCE40 UltraPlus
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iCE40 UltraPlus Mobile Development Platform
Evaluation Board User Guide
© 2017-2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02007-1.1 3
Figures
Figure 2.1. iCE40 UltraPlus Mobile Development Platform Board (Top Side) ...................................................................... 6
Figure 2.2. iCE40 UltraPlus Mobile Development Platform Board (Bottom Side) ................................................................ 7
Figure 3.1. Power Block Diagram .......................................................................................................................................... 8
Figure 4.1. Clock Sources for the iCE40 UltraPlus MDP Board ............................................................................................. 9
Figure 6.1. Rework Resistor Positions Described in Parallel Video Bus Configuration ....................................................... 13
Figure 7.1. Board Configuration for Programming iCE40 UltraPlus Device “UI” ................................................................ 15
Figure 7.2. Programming iCE40 Devices on Board.............................................................................................................. 17
Figure 7.3. Programming SPI Flash on Board ...................................................................................................................... 18
Figure A.1. Block Diagram ................................................................................................................................................... 22
Figure A.2. iCE40UP5K FPGA A - Display ............................................................................................................................. 23
Figure A.3. iCE40UP5K FPGA B - Audio ............................................................................................................................... 24
Figure A.4. iCE40UP5K FPGA C - Sensor .............................................................................................................................. 25
Figure A.5. iCE40UP5K FPGA D - Camera ............................................................................................................................ 26
Figure A.6. Common Components- SPI ............................................................................................................................... 27
Figure A.7. Display Circuitry ................................................................................................................................................ 28
Figure A.8. Audio Circuitry .................................................................................................................................................. 29
Figure A.9. Sensor & RGB Circuitry ..................................................................................................................................... 30
Figure A.10. Camera Circuitry ............................................................................................................................................. 31
Figure A.11. USB Programming .......................................................................................................................................... 32
Figure A.12. Power Supplies ............................................................................................................................................... 33
Figure A.13. Common Components .................................................................................................................................... 34
Figure A.14. Battery Connector & Charger ......................................................................................................................... 35
Tables
Table 7.1. iCE40 UltraPlus Device Selection ....................................................................................................................... 14
Table 7.2. iCE40 UltraPlus Device Selection Summary ....................................................................................................... 16

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