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General| Brand | Lattice Semiconductor |
|---|---|
| Model | CrossLink-NX |
| Category | Motherboard |
| Language | English |
Overview of the CrossLink-NX Evaluation Board and its expansion capabilities.
Lists key features, connectors, and interfaces of the evaluation board.
Details the specific CrossLink-NX FPGA device used on the board.
Instructions and expected behavior when applying power to the board.
Describes the primary interface for programming the FPGA using JTAG.
Explains alternative methods for JTAG programming and connections.
Details using JTAG to access the SPI Flash memory for programming.
How to select the correct SPI Flash device in the programming software.
Information on additional JTAG configuration pins and test points.
Describes the I²C bus topology for configuration and communication.
Explains the board's UART support and connection options.
Details the SPI connections for configuration from SPI Flash or header.
Configuration of the eight-position DIP switch for manual FPGA inputs.
Description of the three push buttons and their functional or generic uses.
Details the fourteen general-purpose LEDs connected to I/O banks.
Explains the purpose and status indicated by various indicator LEDs.
Pin connections and ball mapping for the FMC LPC connector.
Pin connections for the parallel FMC configuration header.
Pin connections for the Raspberry Pi GPIO header for I/O expansion.
Pin connections for the camera connector (CN1).
Pin connections for the D-PHY1 header (J6).
Pin connections for the PMOD connectors (J17, J18, J19).
Pin connections for the JTAG header (J1) for programming and debugging.
Pin connections for the parallel configuration header (J27).
Pin connections for the ADC test header (J26).
The title page of the evaluation board schematics.
High-level block diagram of the CrossLink-NX Evaluation Board.
Schematic details of the USB interface circuit.
Schematic details of the camera interface using DPHYs.
Schematic details for Raspberry Pi and user I/O connections.
Schematic details for SERDES, SMAs, switches, and FMC control.
Schematic details for I2C, LEDs, and push button circuits.
Schematic details for the PMOD connectors.
Schematic details for configuration and Analog-to-Digital Converter (ADC) circuits.
Schematic details for the FMC Low Pin Count (LPC) connector.
Schematic details of power supplies to CSI and various I/O banks.
Schematic details for power decoupling circuits on the board.
Schematic details of the power regulator circuits on the board.
High-level block diagram illustrating the board's power distribution.
List of related documents available from Lattice Semiconductor.
Summary of changes made in Revision 1.3 of the document.
Summary of changes made in Revision 1.2 of the document.
Summary of changes made in Revision 1.1 of the document.
Summary of initial release changes for Revision 1.0.
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