CrossLink-NX Evaluation Board
User Guide
© 2019-2020 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02028-1.3 17
4.5. Other JTAG Configuration Pins
The CrossLink-NX Evaluation Board provides test points for other JTAG configuration pins as shown in Table .
Table 4.2. Other JTAG Signals
CrossLink-NX Ball Location
For more information on CrossLink-NX JTAG and SPI programming, refer to CrossLink-NX sysCONFIG Usage Guide
(FPGA-TN-02099).
Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.