Lattice Semiconductor CrossLink-NX User Manual

CrossLink-NX Evaluation Board
User Guide
© 2019-2020 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02028-1.3 57
Revision History
Revision 1.3, November 2020
Section
Change Summary
Headers/Connectors and LIFCL-40
Device Ball Mapping
Made the following revisions in Table 8.1. FMC LPC Header Pin Connections.
 Changed G32 pin to V16
 Changed G34 pin to W17
—
Corrected table numbering in chapters 7 and 8.
Revision 1.2, August 2020
Section
Change Summary
Introduction
Added Figure 1.3. Silkscreen of CrossLink-NX Evaluation Board and Figure 1.4. Silkscreen of
CrossLink-NX Evaluation Board (Bottom).
Jumpers and Test Connection
Updated J24 and J25 usage for ADC testing in Table 2.1. Jumper Table.
Appendix A. CrossLink Evaluation
Board Schematics
Updated schematics to version B-1.
Appendix D. Schematics Updates
for ADC Test
Added this section.
Revision 1.1, March 2020
Section
Change Summary
Introduction
 Added Potentiometer for ADC test feature.
 Added call-outs to Figure 1.2. Bottom View of CrossLink-NX Evaluation Board.
 Updated the CrossLink-NX Device and the Applying Power to the Board sections.
Appendix C. Fast Configuration
Issues
Added this section.
Revision 1.0, December 2019
Section
Change Summary
All
Initial release
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Lattice Semiconductor CrossLink-NX Specifications

General

Brand	Lattice Semiconductor
Model	CrossLink-NX
Category	Motherboard
Language	English