Lenovo System x3850 X6 - Page 7

Lenovo System x3850 X6 and x3950 X6 Quick Start Guide 7
Figure 5 shows the Intel Xeon E7 memory controller architecture. Note that memory is
populated from the furthest DIMM (Slot 0) to the closest DIMM slot (Slot 2).
Figure 5 Xeon E7 memory controller architecture
Intel
Xeon
processor
Memory
controller 1
Memory
buffer 1
DIMM 19 DIMM 21 DIMM 20
Slot 2Slot 1Slot 0
Slot 2Slot 1Slot 0
DIMM 1 DIMM 3 DIMM 2
Memory
controller 2
Memory
buffer 2
DIMM 6 DIMM 4 DIMM 5
Slot 2Slot 1Slot 0
Slot 2Slot 1Slot 0
DIMM 24 DIMM 22 DIMM 23
Memory
buffer 3
DIMM 16 DIMM 18 DIMM 17
Slot 2Slot 1Slot 0
Slot 2Slot 1Slot 0
DIMM 10 DIMM 12 DIMM 11
Memory
channel 0
Memory
channel 1
Memory
channel 2
Memory
channel 3
Memory
buffer 0
DIMM 9 DIMM 7 DIMM 8
Front DIMMs
Slot 2Slot 1Slot 0
Slot 2Slot 1Slot 0
DIMM 15 DIMM 13 DIMM 14
DDR3 ch 0
DDR3 ch 1
DDR3 ch 0
DDR3 ch 1
DDR3 ch 0
DDR3 ch 1
DDR3 ch 0
DDR3 ch 1
Back DIMMs