LG 37LC50CB - Block Diagram

BLOCK DIAGRAM
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LGE Internal Use OnlyCopyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
1. Overall Block Diagram (D2A + BCM7411 + Cortez Adv.)
DIGIT_D[0-23]
H,V_SYNC_DIGIT
DE,CLK_DIGIT
D2A_VIDEO_OUT
TMDS_0
TMDS_1
DDC_I2C_0,1
EEPROM
_1
EEPROM
_0
TUNER_CVBS
ATSC/NTSC
Tuner
R,G,B
VGA_H,V SYNC
CABLE_DET
COMPONENT (Y,Pb,Pr)
COMPONENT (Y,Pb,Pr)
REAR CVBS SIDE_CVBS S_VIDEO Y,C(rear/side)
S_VIDEO DET
TUNER_CVBS
I2S
Comp_1/2 L/R
MSP L/R
Analog L/R
CVBS,S-VIDEO L/R
VGA L/R
MNT_OUT_L/R
SPDIF_OUT
IR
I2C_D2A (AT)
I2C_Cortez (NT)
I2C_Cortez
SIDE L/R
D2A
UART_D2A_0
RS232
232C_Tx / Rx
MSP4450K
TPA3100D2
I2C_Cortez
MNT_V_OUT
INV_BR
DIGITAL_IN[24Bit]
DE,CLK_IN
DIGITAL_H,V_SYNC ANALOG_IN
ANALOG_H,V_SYNC ANALOG_IN
CABLE_DET
ANALOG_IN
ANALOG_IN ANALOG_IN ANALOG_IN ANALOG IN
INV_BRI
DISPLAY_EN
AI_ON_OFF/OD SEL_1
LVDS_DATA
LVDS_DATA
DISPLAY_EN
INV_CTL
IR
UART1
UART1
LVDS
Conne cto r
For LCD
POWER
HDMI
SiI9023
NVRAM
EEPROM
16 KB
DDRRAM
(256 Mb )
$4
Flash
2MB
$1
232C Driver
ST3232CDR
NVRAM
EEPROM
32KB
AT49BV160C
F-ROM (2MB)
$ 0.46
DDRRAM
(32MB)
$2.7
I2C MUX
S
I
F
_
T
U
N
E
R
I2S
I2S
NJU26901
ANT./Cable
I2C_D2A
VSB
Pro:Idiom
BCM7411
DDRRAM
(128 MB )
I2S
CPLD
12_to_24
EBI
8_to_16
8
16
DIGITAL_IN[24Bit]
DE,CLK_IN
DIGITAL_H,V_SYNC
UART_D2A_1
SERIAL_TS
I2S
DIGIT_D[0-23]
H,V_SYNC_DIGIT
DE,CLK_DIGIT
Cortez-A.
FLI8662
UART
MUX
UART0
UART0
MSP SPDIF
Paral lel To Serial
SPDIF
MUX
7411 SPDIF
D2A SPDIF
D2A SPDIF
I2S
MUX
Impl emented
in CPLD
I2C_Cortez_5V