LG 42LC7D - EXTERNAL EQUIPMENT SETUP; HD RECEIVER SETUP

BLOCK DIAGRAM
- 19 -
HD2_DAC_LRCLK
HD2_ICE958_IN
HD2_DAC_SCLK
HY57V161610
SIF
MSP
4450
PAL Tuner
(TAUM-W101P)
COFDM DEM.+
DVB Tuner
(TDFB- Z205P)
CVBS
Y,C
IIC4
IIC1
99
Data[ 0:7], VH_TP_CLK
VALID
EEPROM
(AT24C512
)
IIC2
SDRAM (4EA)
(HY57V641620B)
SDRAM (4EA)
(HY57V641620B)
Side AV
V,LR
3
Side AV
V,LR
33
Rear AV
V,LR
3
Rear AV
V,LR
33
Rear S
YC
2
Rear S
YC
22
MNT_Out
V
1
V
11
MSP445
0
Ext A LR
22
TP/ D1
99
YCbCr
H,V,CLK
FID
30
YCbCr
2020
H,V,CLK
33
Y/ U/ V
IIC3
Reset
1010
TP[ 0:7],
TP_CLK,
TP_valid
CPU ARM
(S3C44
B0X)
X-tal
(10M)
I2C Hub
(PCA9516)
IIC1 IIC2 IIC3 IIC4 IIC1 IIC2 IIC3 IIC4 IIC1 IIC2 IIC3 IIC4
KIA7029
74HC14D
Reset
SDRAM (2EA)
(HY57V641620B)
SDRAM (2EA)
(HY57V641620B)
FLASH (2EA)
(AT49BV160)
FLASH (2EA)
(AT49BV160)
A/ V SW
(CXA2069Q
)
V1
SUB
(V/YOUT2)
VOUT3
OUT1
Y1/ C1
IN3
HD- 2.4
-TP De-Mux -MPEG Decoding : MP@HL -Format Converter -Host I/ F, Memory I/ F -Digital I/F -Video DAC, NTSC Encoder -AC-3 Decoder/SPDIF In/ out -IEP2
SPDIF
Out
SPDIF
In
SPDI
FOut
SDRAM I/ F
Text
Decoder
(SDA6001)
EPLD1
(XC95144XL
)
Control GPIO
Peripheral Bus
SPIDIF_IN_BYPASS
88
2
RX[ 0: 2]–
,
RXC –
DDC(I2C)
EEPROM
(AT24C02N)
33
YCbCr
Vid eo SW
(CXA2181Q
)
RGB-DTV/-PC
5
RGBHV
Comp_1
YCbCr
33
Comp_2
YCbCr
33
EPLD1
(XC95144XL)
DVI_H,V,DE
FID
33
OR
3
IIC3
SIF
PAL
Tuner
Ext A
L/ R
22
CXA2069
Comp_1
22
L/ R
Comp_2
22
L/ R
Sound
Proc
(MSP4450)
I2S Out
33
HD-II
HD-II
I2S_In
MNT_Out
L/ R
22
RGB(Phone)
22
L/ R
Audio ADC
(CS5331)
PWM
MODULATOR
(NSP2100A
)
I2S
PWM AMP
(TAS5122)
PWM AMP
(TAS5122))
OR1 OR2 OR3
3
OR
4
VCXO
27Mhz
LGDPLL
(LGDT1901B)
HD2_VDPClk , HD2_NT2CLK
RS-232C
(ST3232)
OR4
HD-II
DVBPAL
RF
SPLITTER
HV,DE
RGB
30
3
DOutClk
LVDS Tx.
(THC63LVD103)
TX[ 0:4]–
TXC–
12
LVDS
WAFER
EEPROM
(AT24C02N
)
Buffer
(MC3307
8)
CLK
11
OR
1
YCbCr
3030
HDMI RX
& ADC
(MST3362M)
10-bit
HDMI-Stereo
1A + 1D Video A/ D
HY57V161610
EEPROM
(CAT24WC)
uCom
(MTV416M)
V4
Through
out
MAIN
(V/YOUT1)
SPDIF Rx.
(CS8415)
RX_HDMI_SPDIF
IIC1
X_tal
24Mhz
2
DDC(I2C)
2
H/V
X-tal
(24.576
M)
1
TXT_CVBS
2
IIC2
TXT R/ G/ B,
FB/ H/V
6
1
1
1
3
Periphera
l
(FMS6403
)
33
YCbCr
Y/ U/ V
3
H/V
22
H,V,CLK
OR2
3
IIC4
FID
IIC2
1
FID
OR3
HD2_ICE958_OUT
1
IIC4
IIC2
IIC2
2
HD2_SYSCLK
1
EPLD1
(XC95288XL
)
2
HD2_SYSCLK , EPLD_CLK
IIC3
IIC4
1
2
L/ R
SCK /LRCK / LRCH
3
SCK / LRCK / LRCH
4
SCK /LRCK /
LRCH / MSCK
1
MCLK
2
BSS83
Video
Decoder
(uPD64015)
3D Y/C Separator