LG 49UJ634V - Page 20

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Copyright © LG Electronics Inc. All rights reserved.
Only training and service purposes.
[ST_GPIO_05_IR_RX] [ST_GPIO_00_WOL_WAKE_UP]
WOL/ETH_POWER_ON
USB_CTL2
K3Lp
MICOM
USB2_2.0 OCP USB2
[RTC_XO_USBOCD0]
[GPIO_79_USB_PWR0_SD_WP]
INSTANT_BOOT
/USB_OCD2
USB_CTL3
USB3_2.0 OCP USB3
[RTC_XI_USBOCD1]
[GPIO_78_USB_PWR1_SD_CD]
/USB_OCD3
[RST]
SOC_RESET
[AH16,AH17,AG16,AG17,AJ16]
BIT0~4
HW option
ADC 1~5
[GPIO_119_PC_RST]
PCM_RESET
CI_SLOT
CI power
enable control
[AIO2R_CMD_VCC_SC]
PCM_5V_CTL
Panel
[GPIO_4_VBY_HTPD/TCON_14]
EPI_MCLK
[GPIO_5_VBY_LOCK/EPLOCK]
LOCKAn
[GPIO7_PMIC_RESET]
PMIC_RESET
PMIC
[GPO011_PWM_DIM_1] [GPIO010_PWM_DIM_0]
PWM_DIM2
POWER
PWM_DIM
[GPO012_LD_SPI1_SCK]
L/DIM_M0_SCLK
[GPO013_LD_SPI1_SDO]
L/DIM_M0_MOSI
[GPO014_LD_SPI1_SYNC]
L/DIM_M0_VS
EPI_GCLK
[GPO_1_TCON_I2C_EN/TCON_2]
[VINBN_VIDCORE]
VID_CORE
CORE DCDC
[VINRP_TUNER0_REST]
/TU_RESET1
Tuner
/TU_RESET2
[VINGP_DEMOD_RESET]
[AI2L_AMP_RESET_N]
AMP_RESET_N
Audio AMP
[AI3R_COMP1_DET]
COMP1_DET
Component/AV Jack
[AIO1L_AV1_CVBS_DET]
AV1_CVBS_DET
[VDBSOUT_SC_PWR_SEL]
SMARTCARD_PWR_SEL
Japan B-CAS
[AIO2L_HP_DET]
HP_DET
H/P Jack
9. GPIO(K3Lp)