LG 50PC5D - Page 13

Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
BLOCK DIAGRAM
Signal path for HDMI
BCM3553
TMDS0 RX0+/- TMDS0 RX1+/- TMDS0 RX2+/-
TMDS0 RXCLK+/-
DDC SDA0
DDC SCL0
EEPROM For EDID
HDCP SDA
HDCP SCL
NDA
NCL
HDMI 0
HDMI 1
HDMi — CEC
+5V Power_0
Hot Plug Detect_0
TMDS1 RX0+/- TMDS1 RX1+/- TMDS1 RX2+/-
TMDS1 RXCLK+/-
DDC SDA1
DDC SCL1
EEPROM For EDID
HDMi — CEC
+5V Power_1
Hot Plug Detect_1
LVDS_Tx
Out
HDMI 2
TMDS2 RX0+/- TMDS2 RX1+/- TMDS2 RX2+/-
TMDS2 RXCLK+/-
DDC SDA2 DDC SCL2
EEPROM For EDID
HDMi — CEC
+5V Power_2
Hot Plug Detect_2
TMDS341A
TMDS0
INPUT
DDC SDA DDC SCL
TMDS1
INPUT
TMDS2
INPUT
TMDS RX0+/-
TMDS RX1+/- TMDS RX2+/- TMDS RXCLK+/-
Hot Plug Detect_0
TMDS
Out
TMDS_Rx Input
HDMi_Sel_0
HDMi_Sel_1 HDMi_Sel_2
Hot Plug Detect_1 Hot Plug Detect_2
+5V Power_0
+5V Power_1
+5V Power_2
GPIO[0:8]
Switch
Selection
DDC INPUT
MTV416
MTV416
Micom
HDMi — CEC
Parallel connections with
HDMi 0,1,2
Only for HD 31P
LVDS
Con.
31P
LVDS
Con.
DVO Out[0:29]
EEPROM
for HDCP
EEPROM
for HDCP
DDC SDA0
DDC SCL0 DDC SDA1
DDC SCL1
DDC SDA2 DDC SCL2
DDC OUT