LG 65SJ8500 - Block Diagram

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Only for training and service purposes.
BLOCK DIAGRAM
OCP
1.5A
Audio 2 AMP
MainSOC
IF (+/-)
USB1 (3.0)
OPTIC
LAN
DDR3 2133 X 16
(512MB X 2EA)
HDMI1 (2.0) HDMI2 (2.0)
HDMI3 (2.0)
SYSTEM EEPROM
(256Kb)
USB2 (2.0) USB3 (2.0)
eMMC
(4GB)
Sub Micom
DDR3 2133 X 16
(512MB X 2EA)
P_TS
X_TAL
24MHz
I2S Out
H/P
AV
D-Demod : I2C 2
R
E A
R
S
I
D
E
R
E A
R
(H)
HP
AMP
SPDIF OUT
BLUTOOTH
IR / KEY/EYE
WIFI
SUB
ASSY
IR
KEY
Tuner : I2C 5
I2C
CVBS/SIF
Tuner
COMP
(ARC)
X_TAL
32.768kHz
OCP
1.5A
OCP
1.5A
Component Spec Out
HDMI4 (2.0)
Apply only CI Slot model
1. SOC