LG 65SJ8500 - Page 16

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Only for training and service purposes.
60P EPI Output
RIGHT
[OUT12P]
:
[OUT17N]
[OUT4P]
:
[OUT9N]
MAIN
SOC
EO, GCLK, MCLK, GST
[TX_LOCKN]
LOCK_IN
PMIC
Sub
PMIC
EO, GCLK, MCLK, GST
P-GAMMA Voltage 8 CH OUTPUT
I2C_2
VCC, HVDD, VGH, VEPI, VGL2, VCOM1,2
Level shifter CLK[1:8]
60P EPI Output
LEFT
P-gamma
(8CH)
0
60
P-gamma
(8CH)
CLK[1:8] CLK[1:8]
VDD, VEPI, Vterm,
HVDD,VCOM1,2,
VGL1,2, VGH
VST, RESET, VGH_E/O
VDD, VEPI, Vterm,
HVDD, VCOM1,2,
VGL1,2, VGH
VST, RESET, VGH_E/O
L
O
CK
CK
_
I
N
C
L
K
[
1
:
8
]
C
L
K
[
1
:
8
]
EPI 6 Lane EPI 6 Lane
VCOM1FB/ VCOM2FB
PANEL_VCC
PANEL_VCC
VDD, Vterm
VCOM1FB VCOM2FB
VST, RESET, VGH_E/O
M16p
7. EPI block (PMIC, EPI model only)