LG 65UM7600PTA - Page 12

- 12 -
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Only training and service purposes.
Main SoC
CEDS 6lane 68Pin /EPI 6Lane 60Pin
BOE Panel
3840x2160@60p
1.5Gbps
[PAD_MOD_TX_P02/N02 ~ P09/N09]
CEDS 6lane 68Pin /EPI 6Lane 60Pin
LGD Panel
3840x2160@60p
3Gbps(55” ↓) /2Gbps(65”)
PMIC
&
Level Shifter
CLK(x10)
VGL1
VST
GIP_RST
LS_VGL
VGH_EVEN
VGH_ODD
HVDD
EPI 3Lane 60P ( 55” ↓ )
EPI 4Lane 60P ( 65” )
EPI 3Lane 60P ( 55” ↓ )
EPI 4Lane 60P ( 65” )
GMA (1, 5, 9, 10, 13, 24,18)
[PAD_MOD_TX_P12(LVA3-)]
PMIC_RESET
LOCKOUT12
GST, E/O, MCLK, GLCK
[PAD_I2S_IN_WS(TCON1)(GPIO)]
[PAD_I2S_IN_SD(TCON2)(GPIO)]
[PAD_SPDIF_IN(TCON3)(GPIO)]
[PAD_GPIO16(TCON4)(GPIO)]
Sub PMIC
VDD
VCOM1
VCOMLFB
VCOMRFB
VCOM2
[PAD_MOD_TX_P02/N02 ~ P09/N09]
GAMMA
BOE Only
GMA
(2, 3, 4, 7, 8,
11, 12, 15, 16, 17)
[PAD_GPIO30SCK4]
[PAD_GPIO31SDA4]
68pin
60pin
68pin
60pin
LDO
VTERM
[ PAD_GPIO17_PM(PM_SPI_CK2] [PAD_GPIO18_PM(PM_SPI_DI2)]
[PAD_GPIO19_PM(PM_SPI_DO2)]
[PAD_GPIO10_PM(PM_SPI_CZ2)]
2. EPI / CDES