LG 65UM7600PTA - Block Diagram

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Copyright © LG Electronics Inc. All rights reserved.
Only training and service purposes.
Main SoC
eMMC (4GB)
CI Slot
USB1 (2.0)
OCP
USB2 (2.0)
HDMI3 HDMI2(ARC) HDMI1
Air/ Cable
TUNER
(T2/C/A)
TUNER
(S,S2)
DVB- S
LNB
T2/C/S/S2 H-NIM tuner
IF (+/-)
P_TS_OUT
P_TS_IN
MICOM
IR / KEY
USB_WIFI
X_TAL
27MHz
Sub Assy
LAN
ETHERNET
SPDIF
AV/COMP
CVBS/YPbPr
SPDIF OUT
H/P
AMP
RS- 232
MAX323
MAIN Audio AMP
I2S Out I2C 4
Vx1 51P (8 lane)
Vx1 / EPI/ CEDS
FCIC SPI/ I2C 6
Main
PMIC
IF_S
IF
GST/MCLK/GCLK/EO/I2C 6
NVRAM (256Kb)
I2C_1
I2C 2
EPI block
IQ (+/-), IP(+/-)
HDMI4
TS
EPI 60P (65”:8 lane, 55”↓:6lane), CEDS 68P
Area OPT
USB_WIFI
1.5V
DDR
0.95V
Core&CPU
3.3V
Normal
1.0V
Eth
3.5V
ST_BY
1.8V
5V
Normal
Sub
PMIC
0.95V 1.5V
3.3V 5V
1
V
1
.8V
3
.5V_ST
0.95V 1.5V
3
.3V
3.3V
3.3V
5V
5V
1V
1
.8V
1.8V
3.5V_ST
3.5V_ST
3.3V
3.5V_ST
3.5V_ST
13V
3.5V_ST
13V
3.5V_ST
13V
3.3V
13V
13V
3.3V
13V(PANEL_VCC)
13V(PANEL_VCC)
To
P
anel
F
rom
P
ower
B
/ D
13V
Signal Process
Power Supply
Input/ Output Power
To WIFI/BT
C
ombo
eMMC
CLK/DATA/STRB
* H/P for US model * CI Slot for Europe model
* HDMI4 :except UM71,UM73 model
BLOCK DIAGRAM
1. Main SOC