LG GT500 - 3 Technical Description; Digital Baseband (DBB) & Multimedia Processor

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Only for training and service purposes
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3. Technical Description
3.1 Digital Baseband (DBB) & Multimedia Processor
3.1.1 General Description
y Access subsystem
- Access Central Processing Unit (CPU) subsystem – ARM926, Joint Test Action Group (JTAG), Embedded
Trace Module (ETM), Instruction and Data (I&D)-cache, and I&D-TCM
- Access peripheral subsystems – Subscriber Identity Module (SIM) interface, IrDA®, Universal Serial Bus
(USB), Universal Asynchronous Receiver/Transmitter (UART), and so on
- Digital Signal Processor (DSP) subsystem – CEVA-X1620, JTAG, Static Random Access Memory (SRAM),
and Program Data Read Only Memory (PDROM)
- EDGE/GSM/GPRS (EGG) subsystem – EGG hardware accelerators
-WCDMA subsystem – WCDMA hardware accelerators
-Application subsystem
- Application CPU subsystem – containing ARM926, JTAG, ETM, I&D-cache, and I&D-TCM
- Application peripheral subsystems – I2C™, keypad, UART, and so on
- Graphics subsystem – XGAM subsystem
- Audio Processing Execution (APEX) and video encoder subsystems
In addition to the two subsystems above, there is also a test block, chip control block, and a pad
multiplexing block residing at the top level
y DSP
- The Digital Signal Processor Subsystem (DSPSUB) includes a DSP megacell, which contains the DSP CPU
together with a tightly coupled memory. The DSP is the Ceva-X 1620 core with a 64 KiB instruction RAM
and a 64 KiB data RAM. It also contains debug logic and interfaces. In addition to the megacell, the
DSPSUB includes external memories, peripheral units, and interfaces. The DSP megacell is clocked at 208
MHz.
- The DSPSUB includes an AHB master and an AHB slave interface. The AHB master provides a direct access
to the Internal Random Access Memory (IRAM) in the EGG core through the AHB. The AHB slave interface
allows the CPU and the DMA to access in the program and data RAM residing in the DSPSUB.
y Image Signal Processor(MV9319)
- MV9319 is high-end Image Signal Processor (ISP) supporting image sensors up to 5 mega pixels. Its
powerful image processing fuctions such as edge enhancement, color correction, advance interpolation,
Auto White Balancing increases the quality of sensor image. MV9319 also supports serial interfaces to
Flash LED control.
y WCDMA subsystem
- The digital baseband controller WCDMA subsystem incorporate a WCDMA modem
- An interface to the WCMDA together with memory control and an internal single port RAM. The WCDMA
subsystem has three AHB slave interfaces.
- The Ericsson DB 3200 also includes HSDPA class 6 functionality.
- The WCDMA subsystem is handled and provided by Ericsson.
y XGAM subsystem
- The XGAM subsystem is a graphics acceleration module that provides hardware support in the creation
of visual imagery and the transfer of this data to a display. The XGAM also provides support for connecting
a Camera module. The visual data could be graphics, still images, or video.
- The XGAM subsystem is handled and provided by Ericsson.
y Operation and Services
-IC™Interface
-SIM Interfaces
- General Purpose I/O (GPIO) Interface
- External Memory Interface that supports NAND, NOR, PSRAM, SDRAM,
- JTAG
-RTC
-ETM9
3. Technical Description