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LGE Internal Use Only Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL DESCRIPTION
F. System Control Subsystem
The SYSCON is responsible for clock generation and clock and reset distribution within the digital
baseband controller, as well as to external devices.
The digital baseband controller chip-ID number is readable from the SYSCON.
The block is a slave peripheral under control of the ARM processor. The programming of the
SYSCON controls the fundamental modes of operation within the digital baseband controller.
Individual blocks can also be reset and their clocks held inactive by accessing the appropriate
control registers.
3.1.4 RF Interface
A. GSM Radio Link Interface
DB3200 controls GSM RF part using these signals through GSM RF chip-RF3300.
y RF_DATA_A
y RF_DATA_B
y RF_DATA_C
y RF_DATA_STRB
Figure 3-1- 5. Schematic of GSM RF Interface
B. WCDMA Radio Link Interface
y RF_WCDMA_PA_0_EN
y RF_WCDMA_PA_1_EN
y RF_WCDMA_DCDC_EN
y RF_WCDMA_PWRDET_EN
Figure 3-1-6. Schematic of WCDMA RF Interface
TX_ADC_STRB
D15
RF_DATA_A
B15
B16
RF_DATA_B
C15
RF_DATA_C
A16
RF_DATA_STRB
QDATA_AMP_MSB
IDATA_FREQ_MSB
AMP_FREQ_LSB
DATA_STR
TX_ADC_STRB
B14
RF_WCDMA_PA_0_EN
D14
RF_WCDMA_PA_1_EN
RF_WCDMA_PWRDET_E
C13
B6
TX_POW
B13
RF_WCDMA_DCDC_EN
DAC_I_NEG
E7
D7
DAC_I_POS
E6
DAC_Q_NEG
DAC_Q_POS
D6
D9
ADC_I_NEG
C9
ADC_I_POS
ADC_Q_NEG
C8
D8
ADC_Q_POS
WTX_BAND_2_EN
WTX_BAND_1_EN
WRX_Q_P
WPOW_DET_EN
WTX_BAND_8_5_EN
WTX_I_N
WTX_I_P
WTX_Q_N
WTX_Q_P
WRX_I_N
WRX_I_P
WRX_Q_N
WPOW_DET
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