- 28 -
LGE Internal Use Only Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL DESCRIPTION
3.1.9 USB
The USB block supports the implementation of a “High-speed" device fully compliant to USB 2.0 standard.
It provides an interface between the CPU (embedded local host) and the USB wire, and handles USB
transactions with minimal CPU intervention.
The USB specification allows up to 15 pairs of endpoints. Data for each endpoint is buffered in RAM
within the USB block and is read/written from the endpoint FIFO using DMA transfers or FIFO register
access. High-speed (high throughput) endpoints can use DMA while slower endpoints can use FIFO
register access.
The USB block can request up to six DMA channels, three for IN endpoints and three for OUT endpoints.
Table 3-1-6. USB Signal Interface of DB3200
USB data7USB_DAT7
USB chip selectUSB_CS_PD
USB data0USB_DAT0
USB data1USB_DAT1
USB data2USB_DAT2
USB data3USB_DAT3
USB data4USB_DAT4
USB data5USB_DAT5
USB data6USB_DAT6
ULPI stop signalUSB_STP
ULPI direction signalUSB_DIR
USB clockUSB_CLK
ULPI next signalUSB_NXT
Power supply for Asta USB blockVBUS
NoteUSB Function
To Next Page
Loading...
