LG H990ds - Camera Block Diagrams

Copyright ⓒ 2016 LG Electronics. Inc. All right
reserved. Only training and service purposes
LGE Internal Use Only
MAIN_CAM0_MCLK
GPIO_30
GPIO_13
CAM0_I2C_SDA
GPIO_17
CAM0_I2C_SCL
GPIO_18
MSM8996
Main 16M OIS CAM
5M Front CAM
[5M]
GPIO_84
GPIO_83
30pin (OIS O)
30pin
LDO
SCY99189AM
ON-SEMI
16M_AVDD_EN
+2V8_16M_AVDD
+2V8_VREG_17A
CAM2_I2C_SDA
CAM2_I2C_SCL
MAIN_CAM0_RESET_N
VT_CAM_RESET_N
GPIO_23
VT_CAM_MCLK
GPIO_15
OIS_RESET_N
GPIO_93
+1V8_VREG_L14A
+VPWR
+2V8_VREG_L29A
+1V2_VREG_L6A
+2V8_VREG_L23A
+1V05_VREG_L3A
VREG_L3
Main 8M WIDE CAM
30pin (OIS X)
MAIN_CAM1_MCLK
GPIO_29
GPIO_14
CAM1_I2C_SDA
CAM1_I2C_SCL
GPIO_20
MAIN_CAM1_RESET_N
GPIO_19
[8M]
[16M]
MAIN_CAM1_MIPI_DATA[0
:3]
MAIN_CAM1_MIPI_CLK
MAIN_CAM0_MIPI_DATA[0
:3]
MAIN_CAM0_MIPI_CLK
8M_VSYNC
GPIO_122
VT_CAM_MIPI_DATA[0:1]
VT_CAM_MIPI_CLK
OSI_MVDD
OSI_AVDD
_IO_VDD
DVDD
AVDD
+1V8_VREG_LVS1
+1V8_VREG_L30A
+1V2_VREG_L11A
LDO
SCY99187AM
ON-SEMI
8M_AVDD_EN
+VPWR
+2V8_8M_AVDD
DVDD
IO_VDD
AVDD
DVDD
IO_VDD
AVDD
VOUT_LVS1
VREG_L17
VREG_L23
VREG_L6
VREG_L14
PM8996
VREG_L11
VREG_L30
VREG_L29
GPIO_06
GPIO_07
4. BLOCK DIAGRAM
4.9. Camera Main(16M, 8M) & Front(5M)
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