LG KG290 - Consumer Information on SAR

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3. TECHNICAL BRIEF
♦ Bus Arbitration
♦ 2 Mbits(256Kbytes) SRAM
• Memory Interface
- A[0:23] - 24-bit width Address BUS ( Glue Logic used to A[23] Signal)
- D[0:15] - 16-bit width Data BUS
- _WR, _RD
- _ROMCS1, - Chip Select signals for Flash Memory
- _RAM_CS1 - Chip Select signal for PSRAM
- _UBS, _LBS
- CLK, _ADV, WAIT - for Burst Mode Flash Operation
• SIM Interface
♦ SIMCLK
♦ SIMDATA
♦ SIM_RESET
♦ USB
♦ USBDP/USBDM
• USC
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