LG KS20 - Page 58

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3. TECHNICAL BRIEF
LGE Internal Use Only Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
The 2 MEGA Camera module is connected to CAM-FPCB with 34pin Board to Board connector
(AXK7L34227G). Its interface is dedicated camera interface port in MSM7200. The camera port
supply 24.576MHz master clock to camera module and receive 49.152MHz pixel clock (15fps),
vertical sync signal, horizontal sync signal, reset signal and 8bits data from camera module. The
camera module is controlled by I2C port from MSM7200.
[Table 1.11] Interface of 2 MEGA AF Camera Module
GNDGNDGND20
Vertical SynchOVSYNC19
Horizontal SynchOHSYNC18
AVDD2I2M_CAM_AVDD_2.6V17
LVDD2I2M_CAM_LVDD_2.6V15
AVDD1I2M_CAM_AVDD_2.6V16
Master Clock(24.576M)ICLKIN21
GNDGNDGND3
GNDGNDGND4
Camera reset signalIM_CAM_RESET_N5
GNDGNDGND6
NC7
I2C DataOI2C_SDA8
I2C ClockOI2C_SCL9
NC10
LVDD1I2M_CAM_LVDD_2.6V14
Camera power downIM_CAM_PWDN13
GNDGNDGND12
NC11
Master Clock(45.152M)ICAM_PCLK2
GNDGNDGND1
NotePortNameNo
AVDD2O2M_CAM_AVDD_2.6V34
AVDD1O2M_CAM_AVDD_2.6V33
CVDD2O2M_CAM_CVDD_1.8V32
DataOCAM_DATA(7)30
CVDD1O2M_CAM_CVDD_1.8V31
GNDGNDGND22
DataOCAM_DATA(0)23
DataOCAM_DATA(1)24
DataOCAM_DATA(2)25
DataOCAM_DATA(6)29
DataOCAM_DATA(5)28
DataOCAM_DATA(4)27
DataOCAM_DATA(3)26