LG LF-U850D - Page 15

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Name Pin NO. Type Descri pti on
PCM Audi o Input/Outp ut I nterface
MCLK 21 O Main clock for external ADC.
Clock frequency is 256fs.
MIC_LRCK 22 O PCM Word clock (left-right clock) output of external microphone.
Word clock rate is Fs(variable)
MIC_BCK 23 O PCM bit clock output of external microphone.
Bit clock frequency is 64 Fs (variable)
MIC_SDIN 24 I PCM serial data input of external microphone.
Schmitt-Trigger input.
PWM Audio Output
PWM_CH1_P 44 O Positive PWM output of channel 1.
PWM_CH1_M 43 O Negative PWM output of channel 1.
PWM_CH2_P 42 O Positive PWM output of channel 2.
PWM_CH2_M 41 O Negative PWM output of channel 2.
PWM_CH3_P 40 O Positive PWM output of channel 3.
PWM_CH3_M 39 O Negative PWM output of channel 3.
PWM_LOL_P 34 O Positive PWM output of Line out left
PWM_LOL_M 33 O Negative PWM output of Line out left
PWM_LOR_P 32 O Positive PWM output of Line out right
PWM_LOR_M 31 O Negative PWM output of Line out right
PWM_HP_L 29 O Positive PWM output of headphone left channel.
PWM_HP_R 28 O Positive PWM output of headphone right channel.
System Control Interface
SDA 9 I/O SDA for I2C mode.
SCL 8 I SCL for I2C mode.
Schmitt-Trigger input.
Speci al Control Interface
OVERLOAD 35 I Power stage overload indication input.
Polarity is programmable. Schmitt-Trigger input.
When OVERLOAD is asserted, all PWM audio outputs go to
“LOW” (if PWM_INVERT pin is ‘LOW”).
Internal pull-down resistor.
EPD_ENA 36 O External amplifier power device enable output.
Test M ode
TEST_MODE1 25 I
Test mode selection pin 1.
In normal operation, it should be “LOW” or not connected.
Internal pull-down resistor.
TEST_MODE2 26 I
Test mode selection pin 2.
In normal operation, it should be “LOW” or not connected.
Internal pull-down resistor.