LG LG-D175F - Page 176

5. BLOCK DIAGRAM
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Only for training and service purposes
LGE Internal Use Only
[D175F] Block Diagram - Clock
PM8110
(PMIC)
MSM8x10
(AP+CP)
LPDDR2 4Gb
EBI CLK
19 2MH
XTAL_19M_IN
BB_CLK
BB_CLK_EN
CXO_EN
CXO
USB_HS_SYSCLK
LPDDR2 4Gb
eMMC 4GB
EBI
_
CLK
EBI_CLKB
SDC1_CLK
SDC2_CLK
19
.
2MH
z
XTAL_19M_OUT
SLEEP_CLK
SLEEP_CLK
SPMI_CLK
PMIC_SPMI_CLK
MIPI_DSI_CLK_P
MIPI_DSI_CLK_N
MIPI_CSI0_CLK_P
MIPI_CSI0_CLK_N
GPIO13/MAIN_CAM0_MCLK
3.5” HVGA
(480X320)
GPIO37/UIM1_CLK
GPIO33/UIM2_CLK
GPIO95/UIM3_CLK
GPIO89/1SEG SPI CLK
DTV
26MHz
RF CLK1
GPIO89/1SEG
_
SPI
_
CLK
DTV
WTR2605
XO IN
GPIO27/WLAN_CLK
RF
_
CLK1
RF_CLK2
XO
_
IN
WCN3620
(BT/WLAN/FM)
TCXO_IN WLAN_CMD_CLK