LG LG-D855 - <6-1-1-5_WCD9320> REV

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Only for training and service purposes

LGE Internal Use Only

6. CIRCUIT DIAGRAM

VA6920

C6928 DNI

ANT10002

EAG63652301

FEED

ANT10003

EAG63652301

FEED

R6120

DNI

R6117

44.2K

L6203

100n

L6204

100n

R6109 0

C6117

33p

C6118

33p

TP6101

R6121

R6122

R6123

R6106

R6100 0

R6124

DNI

R6101 0

R6102 0

C6927

22u

CN6450

EAB63288401

BSE

TP6102

TP6103

R6118 0

R6119

C6203

C6204 1u

VA6923

TP6104

C6113 1u

R6116

2.2K

VA6926

VA6927

D6450

D6451

D6700

D6701

FB6202 60

+VPWR

60FB6201

C6110 DNI

0.1uC6107

U6100

EAN62648101

WCD9320

MIC_BIAS1

MIC_BIAS4

MIC_BIAS2

MIC_BIAS3

HPH_LP

HPH_REF

HPH_RM

MICB_CFILT2

MICB_CFILT1

MICB_CFILT3

LINE_OUT1

LINE_OUT3

LINE_OUT2

LINE_OUT4

GND2

MCLK

RX_I2S_WS

RX_I2S_SCK

TX_I2S_WS

TX_I2S_SCK

I2C_SCL

MODE0

MODE1

VDD_IO

RESET_N

VDD_VBAT

CCOMP

GND_CCOMP

GND1

GND3

GND4

GND5

GND6

DMIC0_DATA

DMIC0_CLK

DMIC1_DATA

DMIC1_CLK

DMIC2_DATA

DMIC2_CLK

MIC4_INP

MIC4_INM

MIC3_INP

MIC3_INM

MBHC_HSDET

MIC2_INP

MIC2_INM

EAROP

EAROM

MIC1_INP

MIC1_INM

MIC5_INP

MIC5_INM

MIC6_INP

MIC6_INM

SLIMBUS_CLK

SLIMBUS_DATA

RF_PA_ON

INTR2

INTR1

VDD_SPKDR1

VDD_SPKDR2

SPKR_VSNSP

SPKR_VSNSM

SPKR_DRVP

SPKR_DRVM

VDD_DIG1

VDD_DIG2

VDD_TXADC

VDD_RX

VDD_TX

VDD_BUCK

BUCK_VSW

BUCK_VOUT1

BUCK_VOUT2

LDO_HI_CAP

-NCP_VNEG

NCP_C1P

-CP_C1M

GND_BUCK1

GND_BIUCK2

GND_SPKDRV1

GND_SPKDRV2

GND_SPKDRV3

GND_SPKDRV4

33pC6924

C6925 33p

+1V8_VREG_S3A

+VPWR

+1V2_VREG_L1

2.2uC6109

0.1uC6105

+2V15_VREG_S2A

C6106 4.7u

+1V8_VREG_S3A

C6102 0.1u

0.1uC6111

1800FB6100

C6103 33p

600

FB6101

0.1uC6104

C6101 0.1u

R6107

DNI

C6108 0.1u

C6207

33p

TP6100

1uC6112

C6116

FB6922 1800

SPH0611LR5H

EAB62909301

MIC6923

OUT

VDD

0.1

R6111

C6208

33p

0.1u

C6926

0.1u

C6210

4.7u

C6209

C6202

10u

0.1u

C6201

U6200

EAN63029101

CS35L32

E6A5

SW2

FLOUT1

FLOUT2/AD0

VBST

FLINH

SW1

FLEN

GNDP1

SDA

SPKOUT+

SPKOUT-/VSENSE-

SCLK

SCL

IN+

LRCK

IN-

SDOUT

RESET

GNDP2

SPKRSUPPLY

INT

IREF+

MCLK ISENSE+

GNDA

GNDPLED

ISENSE-/VSENSE+

FILT+

FB6923 60

60FB6924

L6201

VA6924

DNI

VA6928

TP6105

MIC6920

EAB62909301

SPH0611LR5H

OUT

VDD

FB6920

1800

33pC6920

C6921 33p

VA6921

DNI

VA6929

33pC6922

FB6921 1800

C6923 33p

EAB62909301

MIC6921

SPH0611LR5H

OUT

VDD

DNI

VA6922

COMMON_I2C_SCL

COMMON_I2C_SDA

TX_GTR_THRESH

+1V8_VREG_S3A

+VPWR

CODEC_MCLK

AMP_I2S_DOUT

AMP_I2S_WS

AMP_I2S_SCLK

AMP_I2S_MCLK

CODEC_RESET_N

MIC_IN3_P

RCV_P

RCV_N

BUCK_GND

SUB_MIC2_3_BIAS

MIC_IN3_N

MIC_IN2_N MIC_IN2_N

MIC_IN2_N

EAR_MIC_JACK_OUT

AMP_INT_N

LINE_OUT_N

LINE_OUT_P

SPK_P

SPK_N

SUB_MIC2_P

MAIN_MIC_P

HPH_R_OUT

HPH_L_OUT

SUB_MIC2_N

SUB_MIC1_BIAS

MAIN_MIC_N

MAIN_MIC_BIAS

SLIMBUS_CLK

SLIMBUS_DATA

CODEC_INT_2

CODEC_INT_1

AMP_RESET_N

HPH_REF

rev.B

12/20

1/6

12/16

SPK BOOST AMP

Add to T-COIL

12/09

12/10

12/24

Upper FPCB assigned

Lower FPCB assigned

12/03

12/20

MC-C00074-11 : For ESD Protection / Tuning points

Sub_MIC3

(DGMS Guide)

MC-C00075-13 1. Ear_Mic terminals apply protection circuit.

Sub_MIC2

Sub_MIC1

3. Ear-Mic which has control signals design tuning DNI PAD

2. ESD devices are placed as close as possible with Ear-Jack.

for ESD protection each of control signals

(DGMS Guide)

MC-C06162-1 1. Don't connect positive of tantal Cap. to negative voltage if use

2. We recommend Ceramic Cap. in this part

(DGMS Guide)

Main MIC

MC-C04773-8 Must meet all of items

1. ESD protection device should be placed as close as possible to the SPK.

2. When using D-Class Amp, apply the ESD protection device which is less than 50pF

3. Working Voltage of TVS Diode should be higher than the voltage of the Path when TVS Diode is applied in speakers line.

is to isolate speaker driver noise from other circuits.

(DGMS Guide)

Refer to 80-NA556-5 for details.

Note : For SLIMbus mode, MODE0 and MODE1 pins are tied to GND directly. For I2S/I2C mode, both

REV_0.3

Note: GND island for Speaker driver, (GND_SPKDRV) with C6100

differentially to the transducers.

<6-1-1-5_WCD9320>

When USE) TVS devices's Working Voltage must be greater than the Path voltage

MODE0 and MODE1 pins are tied to GND and VDD respectively. The POR for SW support is

Note : A 0.1 ¥ìF capacitor is required and should be

< 6-8-2_Receiver >

placed close to each CFILT pin for noise filtering.

There are a total of three CFILT pins, and if all mic

Rev_0.4

should apply capacitor under 50pF value for ESD protection with d-class amp

bias outputs are programmed to the same voltage,

Note : Verify that the output is connected

through the SLIMbus interface. Contact product management if I2C/I2S support is planned.

only one capacitor is required at this pin.

11/28

A CFILT2 pin is recommended.

Note : Digital inputs should be grounded, while all other pin

types (analog inputs, outputs and digital outputs)

can be left floating. Note bidirectional digital pins

such as I2S_WS or I2S_CLK default to inputs after

reset and should be grounded.

Note : One external capacitors (4.7 ¥ìF) is required; For more

details, refer to the, Reference Schematic (80-NA437-41).

(DGMS Guide)

MC-C04773-8 : For ESD Protection / Tuning points

When USE) TVS devices's Working Voltage must be greater than the Path voltage

< 6-7-1_Speaker >

Rev_0.4

RCV

(DGMS Guide)

When USE) TVS devices's Working Voltage must be greater than the Path voltage

MC-C04773-8 : For ESD Protection / Tuning points

Close to WCD9320

9/24

rev.B

Deleted

11/29

11/26

12/20

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LG LG-D855 - <6-1-1-5_WCD9320> REV_0.3 Diagram

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