LG LG-V909DW - T20+ MDM6600: System IPC & Memory & USIM

6. BLOCK DIAGRAM
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Copyright © 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
LGE Internal Use Only
LPDDR2 1GB
K48G304EC (SS葅)
USIM
ENSY0018701
T20+ MDM6600 : System IPC & Memory & USIM
eMMC_32GB
THGBM2G8D8FBAIB
(TOSHIBA葅
)
MMC_DATA[7:0]
MMC_CMD
MMC_CLK
UART1_IPC_RXD
UART1_IPC_TXD
CP_STATE
SPI1_IPC_MOSI
SPI1_IPC_MISO
MCP
TY9A0A11110KC
1GB/512MB\
EUSY0365502
EBI1_D[15:0]
EBI1_A[12:0]
EBI1_WE/
EBI1_CS/
EBI1_MCLK
EBI1_MCLK/
EBI1_RAS/
EBI1_CAS/
EBI1_BA[NK_A[1:0]
EBI2_CS/
EBI2_OE/
EBI2_WE/
EBI2_WP//
EBI2_LB/
EBI2_UB/
EBI2_BUSY
EBI2_A_D[15:0]
EBI1_DQM[1:0]
EBI1_DQS[1:0]
USIM_RESET/
USIM_CLK
USIM_DATA
DB3350
EUSY0377601
T20
SPI1_IPC_CLK
HSMMC_DAT[7-0]
SPI
UART
MDM6600
ULPI_DATA0
EBI1
EBI2
GMI_WAIT
GMI_CLK
GPIO_43
ULPI_DATA1
ULPI_DATA2
ULPI_DATA3
ULPI_DATA5
ULPI_CLK
ULPI_DIR
ULPI_NXT
KB_ROW10
AP_STATE
GPIO_64
GPIO_78
GPIO_35
USIM_RESET
USIM_CLK
USIM DATA
DDR_A[9-0]
DDR_/DQS[0-3]+/-
DDR_DQ[0-31]
DDR_CS[0-1]_N
DDR_DM[0-3]
/CS[1-0]
DQS[3:0]_n
DDR_CLK
DDR_CLKN
CK
/CK
CA[9-0]
DM[3-0]
DQ[31-0]
UART1_IPC_CTS_N
UART1_IPC_RTS_N
Level Trans.
In PM8028
GPIO_42
GPIO_40
GPIO_41
ULPI_STP
GPIO_34
GPIO_33
GPIO_32
SPI1_IPC_CS
SPI1_IPC_MRDY
SPI1_IPC_SRDY
KB_ROW8
KB_ROW9
GPIO_52
GPIO_51
SPI2_IPC_MOSI
SPI2_IPC_MISO
SPI2_IPC_SCK
SPI2_MOSI
SPI2_MISO
SPI2_SCK
GPIO_31
SPI2_CS0
GPIO_30
GPIO_29
GPIO_28
SPI2_IPC_CS_N
SPI2_IPC_SRDY
KB_ROW8
KB_ROW9
GPIO_52
GPIO_51
SPI2_IPC_MRDY
DDR_DQ[31-0]
DDR_DM[3:0]
DDR_A[9-0]
DDR_CS[1:0]_N
DDR_CLK_N
DDR_CLK
DDR_CKE[1:0
CKE[1:0]
DDR_CKE[1:0]
DDR_/DQS[0-3]+/-
DQS[3:0]
DDR_DQS[3:0]P
DDR_DQS[3:0]N
T20+ MDM6600 : System IPC & Memory & USIM