LG P705 - Page 130

6. BLOCK DIAGRAM
- 130 -
Copyright © 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
GPIO_5
WLAN RST N
TCXO IN
WLAN_RST_N
W
ANT
19.2MHz
GPIO_62
GPIO_63
WLAN
_
RST
_
N
TCXO
_
IN
SDIO_CLK SLEEP_CLK
SDIO_CMD PDET_IN
RF_TX_PA
WLAN_CLK
WLAN_CMD
WLAN_SDIO[0:3]
W
CN1314
CPL
WLAN_TX
AFE
M
32.7678KHz
GPIO_[64:67]
LINE_R_IP
LINE_L_IP
SDIO_DATA[0:3] RF_RX
FM_LO_R BT_RFIO
FM LO L
FM_R
FM_L
FM RDS INT
WLAN_RX
BT_TRX
M
-S102
GPIO_83
GPIO_46
_ _
FM_RDS_INT
BT_UART_TXD
FM
_
RDS
_
INT
BT_UART_TX
BT UART RX
2
27A
Ea
r
GPIO_45
GPIO_44
GPIO_43
BT_UART_RXD FM_HRX_IN
BT_UART_CTS
BT_UART_RTS
BT
_
UART
_
RX
BT_UART_CTS
BT_UART_RTS
M
SM7
2
WCN2
2
r
-Jack
GPIO_6
GPIO_69
GPIO 68
SYS_RST_N
BT_PCM_OUT
BT_RESET_N
BT_PCM_IN
BT_PCM_OUT
M
2
43
GPIO
_
68
GPIO_70
GPIO_71
BT_PCM_IN SLEEP_CLK
BT_PCM_SYNC
BT_PCM_CLK
BT_PCM_SYNC
BT_PCM_CLK
32.7678KHz
LGE400 BT/WLAN/FM Block Diagram
Block Diagram _ BTWIFIFM