Analog 1.1V output
(Host no need to connect)
Can be 1.8V or 3.3V to support always on
circuit of QCA9379-3. This signal must be
connected to 1st power on and last power off
power rail. The design is target to connect to
3.3V
BT wake up Host. 10K PU in the module
, Low Active
Firmware Debug pin, Host can be not
connected
Firmware Debug pin, Host can be not
connected
3.3V input to internal SWREG PMU and
OTPREG PMU
1.8V or 3.3V upon signal interface
Optional external low-power 32.768KHz
input Signal can not be active before
VDDIO_GPIO2 is applied
Analog 1.1V input from Pin#28 of Module
(Host no need to connect)
3.3V Power for both 2.4GHz/5GHz PA in
WLAN Chain 0
Analog 1.1V input from Pin#28 of Module
(Host no need to connect)