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Nations N32G45 Series User Manual

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N32G45x series
32-bit ARM
®
Cortex
®
-M4 microcontroller
User manual V3.0

Table of Contents

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Nations N32G45 Series Specifications

General IconGeneral
GPIO PinsUp to 80
ADC12-bit, up to 16 channels
DAC Channels2
Communication InterfacesUSART, SPI, I2C, CAN, USB
Operating Temperature-40°C to 85°C
PackageLQFP

Summary

Interrupts and events

Nested vectored interrupt controller

Details the NVIC controller, its features, and exception handling.

External interrupt/event controller (EXTI)

Describes the EXTI controller, its edge detection capabilities, and configuration.

Memory and bus architecture

Memory system

Details FLASH specification, iCache, SRAM, R-SRAM, and FLASH register overview.

Power control (PWR)

General description

Explains PWR as a power management unit controlling module status in different power modes.

Power supply

Details MCU working voltage (VDD) and VBAT domain voltage ranges, and the role of BKR and MR.

Power modes

Summarizes the six MCU power modes: RUN, SLEEP, STOP0, STOP2, STANDBY, and VBAT.

PWR registers

Provides an overview table of PWR registers and details specific control registers.

Backup registers (BKP)

BKP registers

Provides an overview table of BKP registers and details specific data, control, and status registers.

Reset and clock control (RCC)

Reset Control Unit

Describes the three types of resets: Power, System, and Backup domain reset.

Clock control unit

Details clock sources (HSI, HSE, PLL) and secondary clocks (LSI, LSE) for system and RTC.

RCC Registers

Provides an overview table of RCC registers and details specific control registers.

GPIO and AFIO

I/O function description

Explains I/O mode configuration, status after reset, bit setting, alternate function, and I/O characteristics.

GPIO registers

Provides an overview table of GPIO registers and details specific configuration, data, and lock registers.

AFIO registers

Provides an overview table of AFIO registers and details control, remapping, and interrupt configuration registers.

DMA controller

DMA registers

Provides an overview table of DMA registers and details interrupt status, flag clear, configuration, transfer number, and address registers.

Analog to digital conversion (ADC)

Function Description

Explains ADC functionality including internal channels, conversion modes, timing, analog watchdog, and DMA.

Calibration

Explains the built-in self-calibration mechanism to calculate calibration factors.

Externally triggered conversion

Details how to trigger regular and injection sequences using external events.

ADC Mode

Describes various ADC modes: Independent, Synchronous Regular, Synchronous Injection, Fast Alternate, Slow Alternate, Rotation Trigger, and Mixed modes.

Temperature sensor

Explains how to configure the temperature sensor and VREFINT for ambient temperature detection.

ADC interrupt

Describes ADC interrupts from conversion completion, analog watchdog, and independent enable bits.

Digital to analog conversion (DAC)

DAC dual-channel conversion

Details dual-channel conversion modes: Independent, Synchronous, Mixed, and Rotation trigger modes.

Advanced-control timers (TIM1 and TIM8)

TIM1 and TIM8 function description

Describes the time-base unit, counter modes (up-counting, down-counting, center-aligned), clock selection, and capture/compare channels.

General-purpose timers (TIM2, TIM3, TIM4 and TIM5)

General-purpose timers description

Describes the time-base unit, counter modes (up-counting, down-counting, center-aligned), clock selection, and capture/compare channels.

Real-time clock (RTC)

RTC function description

Explains RTC block diagram, GPIOs, register write protection, clock source, and prescaler.

CRC calculation unit

Independent watchdog (IWDG)

Window watchdog (WWDG)

Functional description

Explains WWDG operation, including reset conditions based on counter value and window register.

SDIO Interface(SDIO)

Card function description

Details card communication, including voltage range confirmation, card reset, and identification processes.

Universal synchronous asynchronous receiver transmitter (USART)

Quad Serial Peripheral Interface (QSPI)

Ethernet (ETH)

Function description

Explains Ethernet frame formats, pin configurations, SMI interface, RMII interface, and MAC function description.

Comparator (COMP)

COMP working mode

Describes window mode and independent comparator modes.

Operational Amplifier (OPAMP)

Main features

Lists OPAMP main features including four independent amps, track-to-track input, programmable gain, and support for TIM1_CC6/TIM8_CC6.

DVP interface (DVP)

Introduction

Introduces DVP as an optical sensor interface for image capture requirements.

Debug support (DBG)

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