PAMS Technical Documentation 2 - Baseband System
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Pin Signal Symbol Parameter Min. Typ. Max. Unit Notes
1 XRES Reset 0.3 x V
DDI
V Logic Low, active
t
rw
1000 ns for valid reset
2 XCS Chip Select 0.7 x V
DDI
V Logic High
0.3 x V
DDI
V Logic Low, active
t
CSS
60 ns setup time
t
CSH
100 ns hold time
3 VSS GND Ground 0 V
4 SDA Bi-directional serial
interface
0.7 x V
DDI
V Logic High
0.3 x V
DDI
V Logic Low
t
sds
100 ns Data setup time
t
sdh
100 ns Data hold time
5 SCLK Serial clock input 0.7 x V
DDI
V Logic High
0.3 x V
DDI
V Logic Low
t
scyc
250 ns Serial clock cycle
(4MHz)
t
shw
100 ns Serial clock high pulse
width
t
slw
100 ns Serial clock low pulse
width
6
VDDI
VDD digital power sup-
ply
1.6 1.8 1.88 V
7 VDD Booster power supply 2.6 2.78 2.86 V
8 VOUT Booster output 12 V Decoupled to Vflash1
on main PWB with 1uF