ON Semiconductor EZAIRO 7160 SL

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December, 2018 − Rev. 0

1 Publication Order Number:

E7160/D

EZAIRO 7160 SL HYBRID

Wireless-Enabled Audio

Processor for Hearing Aids

Introduction

Ezairo

7160 SL is an open−programmable DSP−based hybrid

specifically designed for wireless, high−performance hearing aids.

The Ezairo 7160 SL hybrid is based on the Ezairo 7100

System−on−Chip (SoC) and includes RSL10− the industry’s lowest

power Bluetooth

5 radio SoC, EA2M a 2 Mb EEPROM, and all

necessary passive components for interfacing with transducers.

Ezairo 7100 features a high precision quad−core architecture that

delivers 375 MIPS without sacrificing power consumption. The

dual−Harvard CFX Digital Signal Processor (DSP) core is optimized

to run advanced hearing aid algorithms, while the HEAR Configurable

Accelerator engine performs many different types of audio processing.

Complementing the DSP core, the Arm

Cortex

−M3 processor

supports wireless protocols and combines an open−programmable

controller with hardware accelerators for audio coding and error

correction support. Ezairo 7100 also includes a programmable Filter

Engine that enables time domain filtering and supports an

ultra−low−delay audio path.

Offering the industry’s lowest power consumption in deep sleep and

peak receiving, RSL10 is a highly flexible multi−protocol 2.4 GHz

radio specifically designed for use in high−performance wearable and

medical applications. With its Arm Cortex−M3 processor and

LPDSP32 DSP core, RSL10 supports Bluetooth low energy

technology and 2.4 GHz proprietary protocols.

Development Tools

Ezairo Preconfigured Suite (Pre Suite)*

The Ezairo Pre Suite provides a complete framework to easily

develop Ezairo−based hearing aids and fitting software. Included in

the Ezairo Pre Suite is a pre−loaded firmware bundle, configuration

software, and a cross−platform Software Development Kit (SDK) to

develop your own fitting software.

RSL10 Development Tools

The RSL10 development tools provide an Eclipse−based SDK

complete with Bluetooth profiles and wireless audio codecs for the

RSL10’s Arm Cortex−M3 processor. The RSL10’s LPDSP32 code

can be developed using the Synopsys development tools which are

available by request.

Open−Programmable Evaluation and Development Kit (EDK)

To develop your own firmware on Ezairo 7160 SL, the Ezairo 7100

Evaluation and Development Kit (EDK) includes optimized hardware,

programming interface, and a comprehensive Integrated Development

Environment (IDE).

*This datasheet describes all features of the Ezairo 7160 SL hybrid module. Not

all of these features are available using the Ezairo Preconfigured Suite.

www.onsemi.com

MARKING DIAGRAM

SIP57

CASE 127EX

Device Package Shipping

†

ORDERING INFORMATION

E7160−0−102A57−AG

(RoHS Compliant)

SIP57

(Pb−Free)

250 / Tape &

Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

(Top View)

E7160−0

XXXXXX

E7160−0 = Specific Device Code

XXXXXX = Work Order Number

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Getting Started Guide21 pages

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Summary

Introduction to Ezairo 7160 SL

Product Overview

Open-programmable DSP-based hybrid for high-performance wireless hearing aids.

Ezairo 7100 SoC Features

Quad-core architecture, DSP, HEAR accelerator, Cortex-M3, filter engine.

RSL10 Radio SoC Features

Low-power Bluetooth 5 radio SoC for wearable/medical applications.

Development Tools

Pre Suite Framework

Framework for developing Ezairo-based hearing aids and fitting software.

RSL10 and EDK Tools

Eclipse-based SDK for RSL10 and EDK for firmware development.

Key Features of Ezairo 7160 SL

Programmable Flexibility

Customizable DSP-based system for specific signal processing needs.

Integrated Hybrid Design

Combines Ezairo 7100 SoC, RSL10 radio, EEPROM, and passive components.

Ezairo 7100 Core Capabilities

Details on Quad-core, CFX DSP, HEAR accelerator, Cortex-M3, and Filter Engine.

RSL10 Core Capabilities

Details on Cortex-M3, LPDSP32, RF Front-End, and Baseband Hardware.

Electrical Specifications

Absolute Maximum Ratings

Electrical parameters defining safe operating limits for the device.

Supply Voltage and Current

Specifies VBAT, VDDO2 supply voltages and current consumption.

Standby and Operating Current

Defines current consumption in different modes including standby.

Voltage Regulator Specs

Details specifications for VREG, VDDA, VDBL, VDDC, VDDM voltage regulators.

Reset and Input Stage Specs

Specs for Power-On Reset voltage and analog input stage parameters.

Input Stage and Output Driver Specs

Details input impedance, noise, dynamic range, and output driver specs.

10-Bit A;D Converter Specs

Specs for the 10-bit low-speed Analog-to-Digital Converter.

Signal Detection and Digital Specs

Specs for signal detection unit, ADC resolution, and digital I/O levels.

PLL and Low Delay Path Specs

Specs for PLL lock time, tracking, and group delay.

Recommended VDDC Levels

VDDC Levels by Frequency

Table showing VDDC levels based on operating frequency.

EA2 M EEPROM and RSL10 Specs

EA2 M EEPROM and RSL10 Electrical Specs

Specifications for EA2M EEPROM and RSL10 electrical parameters.

Packaging and Manufacturing

Package Type and Reflowability

Describes the device's small size and suitability for reflow soldering.

RoHS Compliance and Solder Info

States compliance with RoHS directive and provides solder information.

System Diagram and Interface Specifications

System Diagram

A simplified block diagram illustrating the hybrid system architecture.

Pad Description Overview

Lists the 57 pads and their internal connections on the hybrid.

Pad Description Details

Interface Pad Listings

Continues listing pad names, ball numbers, and descriptions for the interface.

Ezairo 7160 SL Hybrid Schematics

Component Connections and Power Distribution

Circuit schematics illustrating component connections and power distribution.

Ezairo 7160 SL Hybrid Schematics

Schematics and Keep-out Area

Continuation of circuit schematics and top-layer keep-out area diagram.

Connection Diagram

Typical Hearing Aid Connections

Illustrates how the Ezairo 7160 SL connects in a typical hearing aid application.

Ezairo 7100 Architecture Overview

CFX DSP Core

Details the 24-bit fixed-point, dual-MAC DSP core and its features.

HEAR Configurable Accelerator

Describes the optimized engine for common audio processing and filterbanks.

Arm Cortex-M3 Processor Subsystem

Covers support for data transfer, CODECS, and interfaces for the Cortex-M3.

Filter Engine

Explains the low-delay path filter core with up to 160 coefficients.

Ezairo 7100 Digital I;O Pads

Digital I;O Pad Configuration

Lists available DIO pads and their configurable modes and interfaces.

Debug Ports

CFX Debug Port I2 C

Details the hardware debugger for the CFX DSP via I2C.

Cortex-M3 Debug Port I2 C

Describes the debugger for the Cortex-M3 processor via I2C.

Frequency Response Graph

Frequency Response Characteristics

Visual representation of the device's frequency response characteristics.

RSL10 Architecture Overview

Chip Identification

Details how to retrieve system component identification for Ezairo 7100 and RSL10.

Solder Information

Information on construction materials, moisture sensitivity, and soldering profiles.

Typical Re-flow Profile

Re-flow Soldering Temperature Profile

Diagram illustrating the recommended re-flow soldering temperature profile.

Tape & Reel and Package Information

ESD Precautions and Handling

Warnings and recommendations for handling ESD sensitive devices.

Development Tools and Contacts

Information on development tools, communication libraries, and contact info.

Package Dimensions

Package Dimension Details

Specifies the physical dimensions and tolerances of the SIP57 package.

Recommended Mounting Footprint

Provides a guide for the recommended PCB footprint for the device.