Panasonic RX-DS45 - Page 38

RX-DS45
#1C704 (MN6625): Digital signal processing
[fem | ae
| 2 [rcik | 0 _[crystaltrame clock (Not use, open) | Crystal frame clock (Not use, open) | frame clock (Not use, open)
3 foam | oo (de-emphasis ON at “H”)
(Not used, open}
eine [9 otencai it
| s|sck | Serial bit clock output
Ts [unex
Ez WDCK
De-emphasis ON signal
LR discrimination signal output
Serial data output word clock
L channel deglitch signa!
(Not used, open)
| Interpolation flag
(Interpolation at “H"")
Clock (16.9344 MHz) output
(Not used, open)
Test mode selection
TEST (Not used, connected to +5 V)
fal ; Digital signal output
Mode selector (“L": normal,
: SEEEr | |*H": SLEEP mode)
CSEL fe Test terminal (“L": normal)
Clock output (16.9344 MHz)
(Not used, i ee
see block (Q data)
Sub-code frame (Q data)
ail ise cok Cs had!
[23 |Rer | | Reset signal input (reset at “L")
®1C705 (LC3517BMLTP): De Interleave
vo
A7~AO | Address input
J lomce | 1 Jomo
—— Ground Connection
MCLK
Command clock signal input
Command data input
fo | Muting control
Rede Tracking servo ON signal
OMUTE
“eae (tracking servo ON at “L”)
STAT Processing condition (CRC, CUE,
CLVS, TT STOP, FCLV)
Sub-code serial output data
EJ cee Ee (Not used; Bpst)
Clock for sub-code serial output
— Ee (Not used, open)
fas |voo =| | Power supply (connected to +5 V)
FG Spindle motor FG signal input
(Not used, open)
Spindle motor ON signal
esl A (ON at “L")
fa7jec =| o | Spindle motor drive signal
Resynchronizing signal
| ios es (Not used) open}
Drop-out signal (Drop-out at “H”)
(41 jem |
| ot [EFM signal input (PLL)
FM
PLL extract clock input
laa fro to |e PLL frequency comparison signal
D7
fe [| peeeee: piles
00
hes 16 K RAM address signal
RAM/A10
(RAMAO:
LSB,
RAMA10:
MSB)
eit] marc | ay Divison
rie [ao | 1 psi
Output-enable input
Function
Read-wright control input
Address input
Power supply