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Philips 40PFL3088H/12 - Circuit Descriptions

Philips 40PFL3088H/12
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Circuit Descriptions
EN 36 TPN10.1E LA7.
2013-Oct-18
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div. table
7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 DC/DC Converters
7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
7.5 Front-End DVB-S(2) reception
7.6 HDMI
7.7 Video and Audio Processing - NT72567BG-BA
Notes:
•Only new circuits (circuits that are not published recently)
are described.
Figures can deviate slightly from the actual situation, due
to different set executions.
For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams
) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts
).Where necessary,
you will find a separate drawing for clarification.
7.1 Introduction
The TPN10.1E LA is a new chassis launched in Europe in
2013. The whole range is covered by NT72567.
The major deltas versus its predecessor support DVB-TC;
DVB-TC/T2; DVB-TC/S2 with also multi-media, CEC,
DLNA, ARC functionality.
The TPN10.1E LA chassis comes with the following stylings:
series xxPFL30xx
series xxPFL31xx
7.1.1 Implementation
Key components of this chassis are:
NT72567BG-BA LFBGA-576 TV Processor for 3188 series
ST03CS-2-E Tuner for H/T series ( DVB-T/C, T2 analogue)
TDQS-A901F EUROP TUNER for K series ( DVB-S2)
NT78820 for T2 demond
AVL6211LA LQFP-64 for S2 demond
STA381BWTR 20W VQFN-48 for AUDIO Amplifier
7.1.2 TPN10.1E LA Architecture Overview
For details about the chassis block diagrams refer
to 9. Block Diagrams
. An overview architecture can be found in
Figure 9.8
.

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