Philips 40PFL8008K/12 - 10-1-8 B02 C, DVBT2 channel decoder

EN 66QFU1.2E LA 10.
Circuit Diagrams and PWB Layouts
2014-Jan-10
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10-1-8 B02C, DVBT2 channel decoder
19370_134_130227.eps
130227
DVBT2 channel decoder
B02C B02C
2012-11-22
4
3104 313 6612
DVBT2 channel decoder
NC
PVDD
DVDDCVDD
VSS
GND_HS
TSDATA
SDA
VIA
TSCLK
TSVALID
TSSYNC
0
1
2
3
4
5
6
7
SCL
XTALO
TAINP
TAINM
RFAIN
GPIO0
GPIO1
GPIO2
TIFAGC
TTUSCL
TTUSDA
TESTMODE
SLVADR0
OSCEN_X
RST_X
SLVADR3
NC1
NC2
XTALI
+1V1-DVBT2
+1V2
CXD2834
0XD8
+1V1
ADDRESS
7KC0
GAIA3
=
I2C
IKC6
IKC7
2KC5
100n
IKC4
2KC0
100n
+1V2-DVBT2-C
VCC-TUNER
1K0
3KC4
RES
9KC0
30R
5KC5
+1V2-DVBT2-C
DKC1
IKC2
+3V3-DVBT2-D
IKC1
5KC6
30R
47p
2KCG
2KCD
47p
IKC0
47R
3KC1
10K
3KC7
DKC0
+1V2-DVBT2-C
2KCP
1u0
2KCR
1u0
10n
RES
2
4
13
2KCH
100n
2KC4
1KC0
41M
3KC9
3K3
3K3
3KC8
+3V3
+1V2-DVBT2-C
2KCC
12p
72
47R
3KC0-2
8
1
IKC3
IKC8
3KC0-1
47R
47R
3KC3
2KCF
100n
+1V1-DVBT2+3V3-DVBT2-D
100n
2KC1
IKC9
43
35
34
57
58
6
11 18 23 27 31 36 39
69
70
71
72
73
74
52
53
54
55
56
59
60
61
62
63
64
65
66
67
68
51
13
14
15
16
17
3
4
46
45
50
30
37
38
24
48
5
8
9
12
47
2
33
40
26
32
41
29
20
21
25
10 22 28 44 7 19 42
49
1
+3V3-DVBT2-D
7KC0
CXD2834ER
100n
2KC7 2KC6
100n
1K0
3KC6
6 3
22R
3KCE
47R
3KC0-3
30R
5KCA
2KCK
6p8
RES
100n
2KC3
FKC1
2KC2
100n
IKCB
30R
5KC9
4u7
5KC1
12p
2KCB
30R
RES
5KC7
5KC8
30R
RES
2KCL
100n
RES
3KCB
47R
47R
3KCA
+3V3-DVBT2-D
+1V2-DVBT2-P
100n
2KCE
IKC5
2KCJ
100n
9KC1
5KC0
4u7
+1V2-FE
+1V2-DVBT2-P
IKCA
10u
2KCS
3KC2
47R
SENSE+1V1-DVBT2
TS-CHDEC-CLK
TS-CHDEC-DATA
SCL-FE
SDA-FE
IF-P-DVBT2
IF-N-DVBT2
AGC-SWITCH
IF-AGC-DVBT2
TS-CHDEC-VALID
TS-CHDEC-SOP
RESET-FUSION-OUTn