Philips 70DCC600

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Signal name Signal flow Function Explanation

TCH1

information of DEQ (see also AUX and

CHO

CH7).

TCH2

TCH3

TCH4

TCH5

TCH6

TCH7

TCHAUX

DAI

-> digital out transmit data Digital data output of DAI according IEC format.

UNLOCK

DAI

-> n.c. unlock VCO UNLOCK indicates that VCO frequency is locked/unlocked

received data.

URDA

DDSP

-> SSC unreliable data Only during playback URDA indicates that, regardless of

all

other flag information, all main data, system information

or AUX data is unusable. URDA occurs during a mode

change from data recording

playback or

the DDSP

must re-synchronize with the tape signals.

USYNCI

DAI

liP

sync input Indicates the start of a new data frame when in transparent

mode.

USYNCO DAI

sync output

Indicates start of a new data frame when in reception

mode.

VAL

DEQ

.....

test pin validation data

Validation signal output for data bits. To test equalization

performance it is possible

output the equalized

channels. The DEQ has for this purpose two digital outputs

present: DIGEYE and VAL (see also DIGEYE).

VIN DEQ

read amp voltage input DEQ inputs via VIN time multiplexed data from read

amplifier. See also RDMUX.

VIRGIN DEQ

.....

DDSP

Virgin

detection Control output of DEQ to inform the microprocessor if a

blank tape is inserted. See also SEARCH.

WCLCK write amp

DDSP

write clock

Clock signal for the write amplifier as timing reference (f =

3.072MHz). See also WCLOCK.

WCLOCK DDSP

.....

write amp write clock Write clock for write amplifier coming from DDSP. See also

WCLK.

WDATA DDSP

.....

write amp write data Serial data signal of the 8 main channels and AUX

channel, directed to the write amplifier.

WIND

Main

ll-P

wind motor

control line Control signal to switch the driver bridge of the wind motor

driver to the desired function. High level

FastForward and

Play mode.

+WIND Wind motor driver

.....

wind supply line

Connection to terminal of wind motor.

-WIND

motor

WRN DDSP

.....

DRAM write enable Write enable of the DRAM.

ERCO

H SSC

word select 1

S-interface word selection I/O line.

DDSP

SSC

connected to SSWS pin of SSC. See also SSWS.

X221N

SSC <-

crystal input 22,5792 MHz

X220UT

SSC

.....

crystal output

X241N

SSC

crystal input

24,576 MHz

X240UT

SSC

.....

crystal output

XTAL1

DAC

<- 256Fs

XTAL2 DAC

.....

n.c.

XSYS

DAC

.....

n.c.

buffered output from crystal oscillator.

924

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