* The SPIDRE is the Signal Processor IC for
DVD Recordable
* The MACE3 is the Mini All in one CD Engine
third generation.
* The Encoder/Decoder is the Translation cir-
cuit for data going to and from the disc.
* The AWSOME is the Adip Decoding, Wobble
Proccesing, Error Correction, Synchronous
start Stop and Occasionally Mend Errors
Initialization process
During power-up, a reset of the BE is preformed.
This is parallel to the reset process of the Digital
Board. After the MACE3 resets, a System reset
occurs to reset the other microcomputers in the
BE. A self-test will automatically start. Each of
the microcomputers must respond to the I
2
C
bus. The SDRAM and flash are also tested. If
the self test passes the SUR signal line will go
Low. Part of the self test is the CPR switching
voltage coming from the Versital Stream
Manager. If it is ready to function, it will be Low.
After the self test passes, the BE will wait for the
first Serial to Basic Engine, S2B, user com-
mand. E.g. "Tray_out".
Disc recognition process
The process of disc recognition is entirely per-
formed within the BE. If the disc is not recog-
nized, the problem is in the BE or something
missing supplied to the BE. Information about
the disc type is sent via the Subcode data path
to the MPEG2 Decoder microcomputer.
DVDR Mechanism
The DVDR-M is made up of three components:
Optical Pickup Unit, OPU, the Sled, and the
Turntable Motor. The OPU contains two lasers:
one for CDs with a wavelength of 780 nm, and
one for DVDs with a wavelength of 650 nm.
The OPU contains: the Optics, the Focus Motor,
the Laser Drive IC (LADIC), the Tilt sensor, the
DVD Rewritable OPU Pre-Processor IC (DROP-
PI), and the EEPROM with the OPU adjustment
data.
Figure 21 - DVDR Mechanism
Figure 22 - Optical Pickup Unit
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