Philips FWP3200D - Main Board Schematics and Layouts

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Main Board
TABLE OF CONTENTS Circuit Diagram................................................................................................................ 6-2
PCB Layout Top View ..................................................................................................... 6-
PCB Layout Bottom View .............................................................................................. 6- 
STM8S105XX DIAGRAM
XTAL 1-16 MHz
RC int. 16 MHz
RC int. 128 kHz
STM8 core
Debug/SWIM
I
2
C
SPI
UART2
16-bit general purpose
AWU timer
Reset block
Reset
POR
BOR
Clock controller
Detector
Clock to peripherals and core
8 Mbit/s
Up to 10 channels
Address and data bus
Window WDG
Independent WDG
Up to 32 Kbytes
1 Kbytes
Up to 2 Kbytes
Boot ROM
ADC1
Reset
400 Kbit/s
Single wire debug interf.
program Flash
16-bit advanced control
timer (TIM1)
timers (TIM2, TIM3)
8-bit basic timer
(TIM4)
data EEPROM
RAM
Master/slave autosynchro LIN master SPI emul.
Beeper
1/2/4 kHz beep
5 CAPCOM channels Up to
4 CAPCOM channels +3 Up to complementary outputs
jomi