Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 94 LC7.5E LA9.
Figure 9-4 DC-DC converter block diagram
9.4 Front-End
Refer to the LC7.2E LA Service Manual.
9.5 DVB-T Signal Processing
Refer to the LC7.2E LA Service Manual.
9.5.1 Common Interface (CI)
Refer to the LC7.2E LA Service Manual.
9.5.2 Supply
The internal voltages that are used are:
• +5 V (+5V_SW)
• +3.3 V (+3V3_SW)
• +1.2 V (+1V2_SW)
• +1.8 V (+1V8S_SW).
During start-up, it is important that the +1V8S_SW line comes
up earlier than the +3V3_MOJO line. In order to implement this,
a delay circuit is added which is shown in figure “Delay
circuitry”.
Figure 9-5 Delay circuitry
Item 7J05 switches the MOSFET “on” and “off” (item 7J04).
The diode (item 6J03) performs a short-circuit protection for the
+3V3 output stage.
9.6 Video Processing
The video processing is completely handled by the Trident SVP
WX68 video processor which features:
• CVBS-input for analogue signals.
• RGB-input for digital (DVB-T) signals.
• Motion and “edge-adaptive” de-interlacing.
• Integrated ADC.
• Built-in 8-bit LVDS transmitter.
• Colour stretch.
• Skin colour enhancement.
• 3D Digital Comb Video Decoder.
• Interlaced and Progressive Scan refresh.
• TeleText decoding.
• OSD and VBI/Closed Caption.
• Digital Natural Motion (DNM).
• MPEG Artifact reduction.
9.6.1 System Overview
Refer to figure “System Overview” for details.
DC_DC
L5973D
UP
CONVERTER
+VTUN
+5V_SW
STANDBY
LD1117DT3
+3V3_STBY
LCD
only
+5V_STANDBY
+5V_SW (for PDP only)
DC_DC
NCP5422
ADR2G
+ 3.3V SW
+
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