Philips PM 3266 - Page 102

107
In
the
2 mV
position,
transistor
V212
conducts
because
of
the 0
V applied
to its
base
via R246
and
V21
1.
The
resulting
negative
potential
on its
collector
is applied
to the
total load
resistors R231
,
R229,
R228
and
R234,
R233,
R236
of
V204
and V203
respectively.
In
this
position,
switching
diodes
V206
and
V207 are
blocked.
The
2 mV
position
is
an extra
facility,
the
bandwidth being
degraded
to 35 MHz.
To
compensate
for any
shift
of the
trace
that
may occur
when
switching
between
the 5 mV
and
10 mV
positions,
preset
R222
is provided.
It
permits
the emitter
current
of V203
to be
adjusted,
as
required.
Emitter
potentials
for V203
and V204
are routed
via
feed resistors
R224
and
R227
respectively.
The RC
networks
R226,
C213arid R230,
C212
provide
damping.
Series RC
networks
R221,C214and
R214,
C206
on
points
1
and
8
of the
cascode
circuit of
D201 prevent
any tendency
for parasitic
oscillation.
The
second
stage of the intermediate
amplifier is
a voltage-to-current
amplifier that
incorporates
the trigger
pick
-off
point, the NORMAL/INVERT
switching
facility, and the
channel selection
switching. The
stage
basically
comprises two
integrated circuits
D202 and D203.
Emitter
points
4 and
5
(D202)
of the input
transistors provide the trigger pick-off
points that
are
routed
to resistors R403
and R414
on the
trigger
circuit. A
number of RC networks across
the common emitter
circuit provide
for
bandwidth compensation
over the frequency range. Preset
components
are
R253, R254
R255 and
C221
.
The NORMAL/INVERT
function
is performed by
a
diode-gate switching circuit
under the control of the
PU LL TO INVERT
switch
S4. In the NORMAL position,
i.e. S4 is open, transistor V216 conducts
because
of the negative
base potential applied
via diode V217 and resistor R263. Point 11 of
D202 is
therefore
at 0 V
and this is
applied to the
bases
of
two transistors,
which conduct and
pass the signal through
D202 without
inversion
(points 1-14,
8-12).
The negative potential via R262 is passed to point 9 of D202 on the appropriate
side of the diode
gate
network.
This negative potential is applied
to
block the bases
of
the other pair of
transistors in
the signal path.
In the INVERT
position, i.e.
S4
is closed, V216 is
cut
off because of
the
0
V
potential applied via
V218.
Point 1
1 of
D202
now becomes negative via R261 and this switchess off the two transistors that
were
previously
conducting. The signal path is now inverted through the integrated circuit (points
1-13, 8-15)
by
the 0 V signal applied via
S4,
R264
to
point
9
of D202.
Any trace shift due to inversion can be corrected by preset R259.
The output signals are fed to pins 1 and 8 of integrated circuit
block
D203, the emitters of the
electronic
switching transistors. Channel selection is by means of
a
diode-gate network, controlled
from the logic circuit.
Front-panel POSITION
control R3 applies
a
variable
potential
to
the
base
of one of the input transistors
to provide
a means of
shifting the
trace.
Transistor V219 provides
a
constant-current source, unaffected by
the
shift control.
3.2.
1
.4.
Trigger pick-off
and
trigger source selection
The
symmetrical trigger inputs from the
A channel intermediate
amplifier (D202) are fed via resistors R403
and
R414
to
points
3
and
6
of D401
.
The symmetrical trigger inputs from the
B channel intermediate
amplifier
(D302) are
fed
via resistors
R453
and
R464
to
points
3 and 6
of D451
.
Diode
switches are
again employed for channel
switching for triggering on channel A, channel B
or for
composite
triggering.
The outputs
are
asymmetrical and are
taken via coaxial sockets to
the trigger amplifier of the
Main and
Delayed time-bases.
The
operation of
the two integrated circuits
D401 and D451 is
identical. Therefore, only the
channel A circuit
D401 IS
described.
Transistor V401 provides a
constant current source
for the trigger
pick-off
stage
for channel A. The collector
output
(point
7)
is resistor-coupled to the
common emitters
of
the
switching transistors to
provide
a
high
gain output on point 1
3
(MTB trigger
output)
and point 15
(DTB trigger output)
when the
appropriate
triggering is selected. Switching is<achieved by
front-panel
selection. When channel A
(DTB)
is
selected, the
-tl
1
,4 V
from p»int 2 of S21
-A (which blocks V403 in the
channel
A OFF position) is removed
and V403
conducts the
channel A trigger signal
(D401/1
5)
to
the delayed
time-base
trigger amplifier. When
channel A
(MTB)
is selected, the
-t1
1
,4
V from point 1
of S22-A is removed and
V404 conducts
(V407 off) to pass
the
channel A
trigger
signal on D401,
point 13)
to the main
time-base
trigger amplifier.