Philips PM 3266 - Page 123

128
WRITE
MODE
See
Fig.
3.14.
for
voltage
waveforms.
When
the
WRITE
pushbutton
(S24B)
is
depressed,
a logic
0 is
applied
to input
14
of
inverter
D2202
(and
to
input
4
of
AND
gate
D2201)
of
the
pushbutton
switch
decoder
to
give
a logic
1
on D2202-15
output
pin
This
IS
applied
to
input
13
of
AND
gate
D2201.
Together
with
the
logic
ones
on the
other
inputs,
1
1 and 12
'
(FAST
and
STORE
pushbuttons
normal),
a logic
1
is
produced
on
D2201-10.
This
logic 1
is
applied
directly
D22(M
^
quadruple
flip-flop
D2204
and
to
inverter
02202/7,6
to
give
a
logic
0
on
input
5 of
flip-flop
With
the FAST
and
STORE
pushbuttons
not
selected
the
input
conditions
of AND
gates
02201/3,4,5,6
and
02201/1,2,8,9
are
such
that
the
outputs
are
at logic
0
and
logic
zeros
are
applied
to
inputs
12
and
4 of flio-
flop
02204.
The
resulting
logic 1 on
input
13
of
02204 gives
a logic
1
on output
pin
02204-15,
the
WRITE
output.
This
decoded
pushbutton
switch
output
is
used to
control
the
WRITE
mode
functions
of the
storage logic
circuits.
It allows
the
required
pulses
to be applied
to the
various
electrodes
of the
c.r.t. after
operation
of
the
ERASE
pushbutton,
S25.
In the
WRITE
mode,
02204-14
is
at logic
0,
which
gives
a
logic
1 on
AND
gate 02207-3.
This
output
provides
the set
input
on 02208-5
for
the
flip-flop.
Therefore,
when
the ERASE
pushbutton
S25 is
released
the
input,
via R2202,
to the
clock,
pin
3,
produces
a
logic
1
on the
Q
output
(pin
1)
to
trigger
the
timer
circuit.
As
stated, the
release
time
of
the ERASE
pushbutton
is
referred
to as
t^,.
The first
section
of the
timer
gives an
output
pulse
on
0221
1-10
that
lasts for
100
ms after
tQ. This
is routed
via
diode V2226
and
R2486
to the
emitter of
transistor
V2458
at the
input
of the front
mesh amplifier.
The
100
ms positive-going
pulse
is passed
to
the base
of V2431,
which
conducts,
shuts
off series
transistors
V2426
V2427
and
brings
series transistors
V2421,
V2422 into
conduction.
In
this
way, the
first
erase
pulse
of 500 V,
100
ms is passed
to the front
mesh
electrode.
This
erase
pulse and
the subsequent
pulses
that
are generated
in
the
WRITE
mode are shown
in Fig. 3.14.
After this
first
erase
pulse;
i.e. at
the time
t^
-i-
100
ms,
the
front
mesh
potential
drops
to
approximately
0 V,
the
voltage
that is
present on
the
output of
the front
mesh
preamplifier;
i.e. on R2474.
This
output condition
is a result
of the
signal
derived
from
the
second
section of the timer, which
gives
a positive output
from
02211-11
for
600
ms. This
is routed
via
inverter
02226/9,10,
AND
gate
02224/3,4,5,6, diode
V2234 and
inverter
02228/5,4
to the
transmission
gate input 02403-12.
The
output on
02403-1
1 is
a 600 ms
negative-
going pulse that
is
adjusted
by
preset
R2577
at
the
input
of
the front
mesh
preamplifier
to give
approximately
0 V
on the front
mesh
after the
first erase
pulse;
i.e. after V2431
is
blocked
at
to
-t-
100
ms.
This
0 V signal
on the
output
of
the front
mesh
preamplifier
is
routed via series
transistors
V2426,
V2427
to
the front
mesh.
In the MAX
WRITE
position,
R2414
is
used
to adjust
the front
mesh potential
to
a value
slightly
higher than
0 V,
to give the background
illumination
of
the c.r.t. the
optimum
intensily.
When
the PERSISTENCE
control
is not in
the MAX
position,
the R2414
preset
is switched
out
of circuit
by
transmission
gate
02403/1,2,13.
This is activated by a
positive
input
to
02226/3,2,
routed
via
02231/5,6,4
and
02231/8,9,10.
The fourth
section
of
the
timer generates
a positive-going
pulse on AND
gate
output 0221
1-4,
which is
applied
to
AND
gate input 02224-5.
Between
600 ms and
1200
ms after
tg this
activates
transmission
gate
02402/2,1,13
via D2224-6.
The high
level input
on 02402-13
connects
the -HI.
2 V on 02402-2
to 02402-1.
The front
mesh can
be
adjusted
by trimmer R2427
to
approximately
-MO V,
the
second
erase
pulse.
After
the end of
this
second
erase
pulse; i.e.
at
tg
-t1200
ms, dynamic
erase
pulses are'
applied
to the front
mesh.
These
pulses
are derived
from
the
dual
oscillator.
The frequency
of
these dynamic
erase
pulses
is
100
FIz and
the duty
cycle lies
between
0 and
30 %
dependent
upon the
setting
of the
PERSISTENCE
control
R16.
Operational
amplifier
02221/2,3,1
together
with its RC
feedback
network R2294,
C2239
provides
a variable
d.c.
level
to the
negative
input
of 02221-6
to produce this
variable duty
cycle.
The
positive
input
02221-5
is
provided
by
the 100
FIz
triangular
waveform
from
the feedback
oscillator
02222/2,3,6.
These
dynamic
erase
pulses
at
output 02221-7
are
applied
to the input
of AND
gate
02224-8.
As the
WRITE
input
is
logic 1 and
the
input
on 02224-2
is
also
at logic
1 after
the
1200
ms
pulse,
then these
dynamic
erase
pulses
are passed
via
02224-9
and R2471
to
transistor
V2419
at the
input
of the
front
mesh
preamplifier.
Trimmer
R2423 in
the
collector
of V2419
is
provided
to adjust
the amplitude
of the
erase
pulses
to
approximately
-t8
V.
These
dynamic
erase
pulses continue
until
the
time that
the
ER.ASE
pushbutton
is
again
released
(t^). From
t
until
1200
ms,
these
pulses
are
held
off
by the
1200
ms
pulse,
which
holds
input 02224-2
at logic
0.
°