130
Fast
Mesh
In
the
WRITE
mode
the
fast
mesh
is held
permanently
at +140
V
during
the
erase/preparation
-
write
-
transfer
cycle
as
there
are no
input
control
signals
on
D2402
pins
5 and 6.
The
input
of
the
fast
mesh
amplifier
is held
at
approximately
+5.4
V
via
presets
R2408
and
R2412.
Collector
Mesh
The collector
mesh
G10 remains
at +150
V
(in all
modes), this
potential being
derived
from
the
+160
V supply
rail via
diode V2457.
Collimator
3
The
3rd
collimator
is held at +75
V for
the first
600 ms
as control input
D2401
13 is
at logic
0. It is then
switched
to a value
between +75
V and
+100
V for the next
600 ms by a logic
1 on the
output of AND
gate
D2224-6
(logic
ones on all
inputs).
This logic
1 is routed
via diode V2234
to control
input D2401-13.
After
the end of the
1200
ms pulse
the output
of AND
gate
D2224-6
reverts
to logic
0 and
collimator 3
output
drops to +75
V.
Collimator 1
At t(j, the
positive pulse on
control input
D2401 -12
applies the
0 V on D2404-11 to
pin
10,
and via R2403,
to
the
base of V2444.
As
a
result,
the collimator
1 electrode
potential is increased
from +30
V to
+90
V for
the duration
of the
600 ms pulse.
Flood
Gun Accelerator
At the time
t^, the flood gun
accelerator,
normally at
+20
V is
increased
to
+50
V for 600 ms by a pulse
from
the second timer
section
D221
1-1
1. This
pulse
is
routed
to
control
input D2401-5 to switch
a
+1
1.2 V
input
on pin
9 to pin
8 and, via R2402 to input
transistor
V2437 of the flood gun accelerator
amplifier.
Collimator
2
The 2nd collimator
is held at a
potential of
between
+30
V and 90 V normally by
preset R2523. However,
the
pulses from
the PERSISTENCE
control
cause V2419 to conduct and
diode
V2464
conducts
as its cathode is
pulsed to the 0
V rail.
Depending on the
position of the PERSISTENCE
control, pulses with
a
duty
cycle of between
0
and
30 % are
routed via diode
V2464 to modify
the potential on integrating capacitor
C2427 at the input of the collimator
2 amplifier.
This varies the
potential on the collimator
2 electrode of the c.r.t. in proportion
to
the
persistence time of the
trace.
FAST MODE
See Fig. 3.15. for
voltage
waveforms.
When
the
FAST
pushbutton (S24C)
is depressed,
a
logic
0 is applied to input
3
of
inverter D2202 (and to input
12 of
AND
gate
D2201) of the pushbutton
switch decoder, to give
a
logic 1 on output D2202-2.
This is applied
to
AND
gate input D2201-5. Together
with the logic ones on the other
two inputs, pins 3 and
5
(WRITE and
STORE pushbuttons
normal), a logic 1 is applied directly to D flip-flop input
D2204-12 and
to
inverter
D2202/5,4 to give a logic 0 on input D2204-5.
With the WRITE and
STORE pushbuttons
not selected, the
input
conditions of AND gates D2201/13,12,1
1,10
and D2201/2,1,8,9
are such that their outputs are at logic 0. Logic zeros are therefore applied
to
inputs
13 and
4 of flip-flop
D2204.
The resulting logic
1 on input D2204-12 gives
a
logic 1 on output D2204-10,
the FAST output.
This decoded
pushbutton
output is used to control the FAST mode functions of
the storage logic circuits
that
provide the various
pulses for
the c.r.t electrodes after operation
of the ERASE
pushbutton
S25.
In the
FAST
mode,
D2204-1 1 output
is
at logic
0,
which gives a logic 1 on
output
3 of AND gate D2207.
This
provides the
set input for
flip-flop
D2208.
Therefore, on the release of
the ERASE
pushbutton
S25
the
positive
clock
input, via
R2202
to pin 3 of D2208
gives
a logic 1 on the
Q output,
pin
1.
This
triggers the
timer
as in the
case of
the WRITE mode.
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