QEI 675 - Detail Circuit Description

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3.
A4-Power
Supply Regulator
Assembly.
This board contains three
power
supplies.
The
IPA-PA
power
supply
regulator,
the
+l5V
FMO
regulator
and
the
5V
FMO
logic
regulator.
All
of
these supplies are short
circuit
protected.
The
IPA-PA
sup-
ply
can
be
varied
from
approximately
14V
to
24V
using the
PWR
ADJ
control
for
the purpose
of
controlling
the output
power
of
the
Exciter.
4-2
DETAIL
CIRCUIT
DESCRIPTION
l.
A2
FMO
and
Phase
Lock
Assembly.
The
output
of
the
FMO
sub-assembly
is
fed
to
the base
of
Ql, the
FMO
buffer.
This stage drives
Q3,
the control
amplifier
and
Ul,
a high speed
emitter
coupled logic
(ECL)
flip-flop.
Q3
raises
the
power
level
to
approximately
100
mw,
a level
sufficient
to drive
the
IPA.
If
an
unlocked condition
is
sensed, a signal
is
devel-
oped
which
causes
Q2
to conduct thereby shorting the base
of
Q3
to
ground
and
shutting
off
the
RF
output.
Q4
provides level matching
between
the output of
Ul
(fc
7
2)
and
the input
of
U2.
U2
is
a high speed divide
by
10
circuit.
The
output
of
U2
is
therefore
fc
7
20.
U3,
U4,
U5
and
U6
make
up
the
prograITJTiable
divider.
By
grounding the appropriate points (as
shown
in Table
5-l
),
this
circuit
can
be
made
to
divide
by
any
whole
number
from
2 to
2000.
For
operation in the
FM
band, the
circuit
is
made
to
divide
by
a
number
between
881
and
1079.
When
this
is
done, the output frequency
of
the prograrrmable
divider
is
5
KHz
when
the
FMO
is
operating
on
the assigned channel.
Q7,
Yl
and
associated
circuitry
form
a
stable
8
MHz
crystal
os-
cillator
which
provides the reference frequency
for
the system.
C27
is
the coarse tune
capacitor
and
QB
(a
transistor
used as a
varicap) provides the voltage
controlled
fine
tuning.
QB
is
con-
trolled
by
the
FREQ
ADJ
pot
on
the
front
panel.
Q9
buffers the
output
of
the reference
oscillator
and
provides level matching to
drive
U7.
U7,
U8
and
U9
are
TTL
integrated
circuits.
The
output
of
U9
is
8
MHz
7
1600
or
5
KHz.
This 5
KHz
square
wave
is
diff-
erentiated
and
applied to
Q7.
When
Q7
conducts,
it
discharges
C21.
C21
is
charged through constant
current
source
Q6,
R46
and
R47.
The
result
of
this
action
is
to convert the 5
KHz
square
wave
to
a
linear
5
KHz
sawtooth.
R47
is
an
amplitude
and
linearity
ad-
justment.
The
5
KHz
output
of
the
programmable
divider
drives pulse amplifier
Q5.
The
output of
Q5
and
the sawtooth converter
are
coupled to
Ul2.
This
IC
and
associated
circuitry
form
a "sample hold" phase
detector.
Ul2
is
a gated Operational Transconductance Amplifier. This device
has
a high
impedance
(constant
current)
output.
R39
and
C20
form
a
-12~