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QEI 675 - Page 13

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2.
3.
storage
circuit.
Ul2
charges
this
storage
circuit
to the point
on
the input sawtooth
which
is
coincident with the pulse
from
QS.
There-
fore,
as the phase angle between the reference derived
and
the
FMO
derived S
KHz
signals
changes, the voltage
on
C20
rides
up
or
down.
However,
since the voltage
can
change only
when
the pulse
from
QS
is
present,
the
filter
required to
eliminate
the reference frequency
is
greatly
reduced.
Ull
is
a high input
impedance
voltage follower
which
eliminates
any
loading
of
the storage
circuit.
The
low
imped-
ance output of
Ull
is
filtered
and
applied to the
AFC
control
port
of
the
FMO
sub-assembly thereby closing the control loop.
QlO
buffers the output
of
U9
(reference
S
KHz)
and
drives the
REF
position
on
the
MULTIMETER.
UlO,
Qll
and
Ql2
dorm
the
circuit
that
senses lock. -
AS
KHz
square
wave
from
U9
and
a S
KHz
pulse
from
the
programmable
divider
are
fed
to
UlO.
If
the
two
inputs are not locked, a square
wave
will
appear
at
pin 6
of
UlO.
This signal
is
converted to a
DC
level
by
Qll
and
this
level
is
applied
to
Ql2
which
drives the
other
half
of
UlO.
The
output
of
UlO
is
then fed
to
Q2
where
it
shuts
down
the
RF
output
and
to
Ql3
which
turns
off
the
AFC
LOCKED
lamp.
A3
IPA
and
PA
Assembly
The
output of the
A2
Assembly
(approximately
100
mw)
is
applied to
Tl.
Tl
and
T2
provide impedance matching
to
the base
of
Ql, the
IPA.
C2
stabilizes
the
amplifier
throughout the
power
adjust
range.
C7,
C8
and
L2
provide impedance matching
between
the
collector
of
Ql
and
the base of
Q2,
the
PA.
LS,
Cl4
and
ClS
provide
impedance
match-
ing
between
the
collector
of
Q2
and
the load.
CRl
and
associated
circuitry
drives the
RF
position
on
the
MULTIMETER.
Parallel
bypass
capacitors
are
used
on
both stages
to
insure
that
the
power
supply
is
bypassed for
all
frequencies. This precaution
is
necessary
due
to the extremely high
low
frequency gain
of
RF
power
transistors.
If
adequate bypassing
is
not used,
low
frequency
oscillations
of
a
sufficient
magnitude to destroy the
transistor
can
occur.
Do
not
operate the Exciter with
any
of
these bypass capacitors disconnected.
Although the
PA
can
withstand
VSWR
without
damage,
good
operating
practice
dictates
that
the
Exciter
should not knowingly
be
operated
without a proper load.
A4
Power
Supply Regulator Assembly.
a.
IPA-PA
Regulator
A
12
volt
zener diode,
CR4,
is
the reference for
this
supply.
The
PWR
ADJ
control
Rl
(front
panel
control)
supplies
all
or
part
of
the
12
volts
across
CR4
to
the base
of
Q2.
Q2
and
Q3
form
a
DC
amplifier
with a gain
of
approximately 2. This
raises
the voltage supplied
to
the base
of
pass
transistor
AlQl
(mtd.
on
heat sink
on
rear
of
unit)
to
approximately 24.7
volts
max.
-13-