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Radio Shack TRS-80 Model 4 - Page 61

Radio Shack TRS-80 Model 4
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turns
off
standard
or
extended
DEBUG.
DEBUG
(OFF
tE)<T)
(ENTER)
Turns
off
DEBUG
and
attempts
to
reclaim
the
high
memory
occupied
by
the
extended
debugger.
(If
anything
is
loaded
in
high
memory
below
the
extended
debugger,
this
area
is
not
reclaimed.)
To
enter
the
monitor
when
DEBUG
is
on,
type:
f i 1 e 5
Pe
C
(ENTER)
TRSDOS
loads
the
program
(as
long
as
the
file's
protection
level
is
not
execute
only)
and
transfers
control
to
DEBUG.
(You
can
also
enter
the
monitor
by
pressing
(BREAK).)
Following
is
a
sample
display
of
the
debugger
screen.
af
= 01
93
S--H--NC
be
= 01
07
=
FC
IB 13
06
2D
06
23
06
d.
=
02
08
=l
05
68
08 00 00
00
4B
49
hi
=
0A
00
=>
FF
19
19
2D
2D
20
2D
2D
af'=
FF
FF
SZIHIPNC
be'=
00
10
=)
C9
00 00
FF
00
FF
00
FF
de'
= 4A B1 =>
03
20 20 20 20 20
20
20
hi'
=
40
92
=> F7 4E
64
69
72
2F
73
79
1X
=
02 08
=)
05
68
08
00
00 00
4B
49
i.
=
00
6A
=>
00 00
04
02
00
00 00 00
30
06
0E
06
28
06
7B
19
•••
-
#.
0
•••
(.
{.
07
60
0B
00
00
00
44
4F
h
••••
KI
.@
....
DO
2D
20 20
2D
20
2D
0A
0A
C9
00 00
81
FF
FF FF
2F
.....
..
I
20
20
20
20
20
20
20
20
73
2C
33
32
00
FF
00
FF
Nd i r / 5 Y
S f
32
....
07
60
0B
00 00 00
44
4F
h
....
KI
.@
....
00
/-~
00
M
05
00
78
00
87
00
••••
x
•••
SP
=
03
EA
=>
88
08
50
06 08 02
20
04
4A
2B
4F 4F
16067805
..
P
....
J+OO
..
x.
=
08
EI
=l
38
07
28
05
79
FE
03
28
6A
E5
23
7D
23
BE
28 20
8,(,
•••
(
o.#}#.(
FF00
=>
20 20 20 20 20
2D
20
ZD
20 20 20 20
2D
20
2D
20
--------
FF10
=)
20 20 20 20
2D
20 20
20
20 20 20 20 20 20 20 20
--------
FF20
=>
20 20 20
ZO
20
20 20 20 20 20 20 20 20 20
2D
20
--------
FF30
=>
20 20
20
20 20 20
2D
20
2D
20
20
20
2D
20 20 20
--------
The
debug
display
contains
information
about
the
Z-80
microprocessor
registers.
The
display
is
set
up
in
the
following
manner:
The
register
pairs
are
shown
along
the
left
side
of
the
display,
from
top
to
bottom.
The
current
contents
of
each
register
pair
are
shown
immediately
to
the
right
of
the
register
labels.
The
AF
and
AF'
pairs
are
followed
by
the
current
status
of
the
flag
registers
to
the
right
of
the
register
contents.
The
other
register
pairs
are
followed
by
the
contents
of
the
16
bytes
of
memory
they
are
pointing
to.
The
contents
are
shown
in
both
hexadecimal
and
ASCII
representations.
Non-displayable
ASCII
characters
are
represented
by
periods.
The
PC
register
shows
the
memory
address
of
the
next
instruction
to
be
executed.
The
display
to
the
right
of
that
address
shows
the
contents
of
that
address
and
the
next
15
addresses.
1-56

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